Fix Spelling (#221)

* Update AMD-Pensando_HA_Proposal.md

Explicitly add 'parallel' to state synchronization stages (per @lguohan )

* Update AMD-Pensando_HA_Proposal.md (#210)

* SAI apigen support for tables with no action parameters and a single action (#207)

* Update .wordlist.txt

* Update AMD-Pensando_HA_Proposal.md

* Doc dash as submodule (#203)

* Document third-party workflows using DASH as a Git submodule.

* Add URL to sample project.

* Incorporate review feedback (typo; missing file).

* Spellcheck fixes.

* Spellcheck

* Add .wordlist.txt to CI triggers.

* Spellcheck wordlist.

Co-authored-by: Chris Sommers <chrispsommers@gmail.com>

* Split SAI API (#201)

Make APIs compatible with SONiC bulk infra

Signed-off-by: Marian Pritsak <marianp@mellanox.com>

* Add APP_DB to SAI mapping (#102)

* Add APP_DB to SAI mapping

* Update .wordlist.txt

Updating w/Chris

Signed-off-by: Marian Pritsak <marianp@mellanox.com>
Co-authored-by: Mukesh Moopath Velayudhan <mukesh@pensando.io>
Co-authored-by: Chris Sommers <31145757+chrispsommers@users.noreply.github.com>
Co-authored-by: Chris Sommers <chrispsommers@gmail.com>
Co-authored-by: Marian Pritsak <marianp@mellanox.com>

Signed-off-by: Marian Pritsak <marianp@mellanox.com>
Co-authored-by: Mukesh Moopath Velayudhan <mukesh@pensando.io>
Co-authored-by: Chris Sommers <31145757+chrispsommers@users.noreply.github.com>
Co-authored-by: Chris Sommers <chrispsommers@gmail.com>
Co-authored-by: Marian Pritsak <marianp@mellanox.com>

.wordlist.txt

@@ -5,11 +5,14 @@ Accton
 ACK
 Ack
 ack
+acl
 ACL
 ACLs
 ACR
 adaptor
 adaptors
+ADDR
+addr
 agnostically
 amd
 apache
@@ -328,6 +331,7 @@ Novus
 NPUS
 NSG
 NSGs
+num
 NumberOfFlowResimulated
 NVA
 NVidia
@@ -383,6 +387,7 @@ Prem
 preprocessor
 preprogrammed
 prereq
+Pritsak
 PrivateAddress
 programmability
 protobuf
@@ -398,6 +403,7 @@ PyTest
 pytests
 Pyunit
 qcow
+qos
 QoS
 Radv
 rdpty
@@ -561,6 +567,8 @@ upstreaming
 vcpus
 veth
 VFP
+vip
+VIP
 virsh
 virt
 virtio
@@ -594,6 +602,8 @@ VPorts
 VTEP
 VTEPs
 VXLAN
+VxLAN
+VxLan
 vxlan
 warmboots
 wflow

documentation/high-avail/design/AMD-Pensando_HA_Proposal.md

@@ -54,7 +54,7 @@ Each DPU sends heartbeat messages at a configured interval to its peer. When a p
 
 ## State Synchronization
 
-State synchronization between the 2 DPUs uses the CNIP IP. All state synchronization happens at the granularity of the DP-VIP and happens from the primary of the DP-VIP towards the secondary. State synchronization happens in 2 stages
+State synchronization between the 2 DPUs uses the CNIP IP. All state synchronization happens at the granularity of the DP-VIP and happens from the primary of the DP-VIP towards the secondary. State synchronization happens in 2 parallel stages
 
 1. Bulk Sync
 1. Data path sync