Fixed bits() on RO register

snabbco · Feb 9, 2018 · 68f0cd5 · 68f0cd5
1 parent ddd90d2
commit 68f0cd5
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/src/lib/hardware/register.lua b/src/lib/hardware/register.lua
@@ -120,8 +120,8 @@ end
 --- Metatables for the three different types of register
 local mt = {
   RO = {__index = { read=Register.read, wait=Register.wait,
-                    reset=Register.noop, print=Register.print},
-                    bits=ro_bits, byte=ro_byte,
+                    reset=Register.noop, print=Register.print,
+                    bits=ro_bits, byte=ro_byte},
         __call = Register.read, __tostring = Register.__tostring},
   RW = {__index = { read=Register.read, write=Register.write, wait=Register.wait,
                     set=Register.set, clr=Register.clr, reset=Register.noop,