Search results

About Using HLS Cache

Status: Open.

#263 In sld-columbia/esp;

· taoistmiao opened on Jun 27, 2025

FPGA Design Filesystem Read Speed

Status: Open.

#260 In sld-columbia/esp;

· dib5230 opened on Apr 24, 2025

Changing ESPLink IP of VCU128 with Ariane Configuration

Status: Open.

#258 In sld-columbia/esp;

· ktlpdlbr opened on Apr 4, 2025

mlp3layers & hls4ml synth failed

Status: Open.

#256 In sld-columbia/esp;

· bgvmad opened on Mar 19, 2025

Unexpected error when building design containing 3 CPU cores

Status: Open.

#234 In sld-columbia/esp;

· treble2 opened on Aug 21, 2024

DTC and vivado_hls errors with bump to Vivado2023.2

Status: Open.

#233 In sld-columbia/esp;

· kcanidaISI opened on Aug 10, 2024

NVDLA does not work with Leon3 on 64-bit DMA NoC

Status: Open.

#219 In sld-columbia/esp;

· jzuckerman opened on Mar 22, 2024

How to use the debug signal of an accelerator

Status: Open.

#210 In sld-columbia/esp;

· LucaUrbinati44 opened on Nov 28, 2023

Trying to make single-core SoC tutorial work for Nexys A7-100T

Status: Open.

#205 In sld-columbia/esp;

· HelpDesperatelyNeeded opened on Jul 26, 2023

Internal compiler error when trying to build risc-v toolchain for ariane processor

Status: Open.

#204 In sld-columbia/esp;

· HelpDesperatelyNeeded opened on Jul 25, 2023

State of ZCU102 support

enhancementNew feature or requestNew feature or request

Status: Open.

#191 In sld-columbia/esp;

· StefMassin opened on Mar 10, 2023

How to change the clock frequency of a SoC prototyped on a xc7v2000t profpga

help wantedExtra attention is neededExtra attention is needed

Status: Open.

#182 In sld-columbia/esp;

· LucaUrbinati44 opened on Nov 14, 2022