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Fixing Urukul v1.3, v1.2 defects #34
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@jbqubit firstly, I'm going to close this since it's not really suitable for an "issue".
The short answer is that this is very doable, but someone needs to organise it. Probably the easiest path is to email TechnoSystem/Creotech and discuss it with them. FWIW I don't have any plans to patch our boards any time soon (we don't have enough spare hardware to swap them out) and I'm not aware of anyone else planning to do it.
I think that's a complete list, but if you want to be sure then you'll need to do some archaeology on the issue tracker I'm afraid (it's easy for changes to be left off the change list).
Again, apologies for stating the obvious, the prospects are that this can happen if you or someone else put the time into organizing it. You'd need to go through the issues and figure out what the changes were, then figure out which if any patches were applied to your boards by hand after production (IIRC this wasn't really documented anywhere). Then contact TS or whoever you want to do the rework and arrange for it to be done. This would all be easier if there were a bit more discipline about the work-flow in Sinara...
The chip itself needs to be replaced as it's been operated outside its abs max ratings and is most likely damaged (e.g. the PG transistor is probably gone so the sequencing won't work correctly which may or may not actually matter in practice). However, it does not necessarily need to be replaced with a different model -- IIRC you may be able to get away with just changing the set voltages on some of the rails See here. However, whoever is organizing this would need to think this fix through and check it's okay.
IIRC Changing the cap should be enough without swapping the LDO for a different PN. Again, see the discussion on the issue.
Not necessary unless you want to use that functionality. See the issue.
I don't think this is strictly necessary, but sure, probably worth doing. |
v1.2 -> v1.3 main change was the addition of the clock mux. |
Okay, well that's not required.
IIRC the PG line was quite far outside its max ratings, and may well be damaged so I wouldn't be surprised if the power sequencing for that chip doesn't work. Having said that, small sequencing issues probably won't cause any harm. |
The absolute maximum rating for PG and VOS is 7V. We have 1k2 pullup to 7.5V. and IC22 VOS is 7.5V in our case. |
So, v1.2->v1.3 also added 0R resistors to ground floating connectors and front panel grounding. |
Wasn't there also an issue with the max current being violated? Although, maybe that's fine as only a brief transient? |
I didn't know about that. That's a nice feature |
Thanks for the thorough replies! As suggested by @hartytp we can also add this to Wiki so users know what patches they might apply themselves (or send back to manufacturer for repair). XXX == @gkasprow please give explicit list of component changes so that that Technosystem/Creotech can develop workflow. patches v1.3 -> v1.4
patches v1.2 -> v1.3
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? I didn't suggest that, but sure, go for it. |
Github remembers the ghost of @hartytp past. :) |
fair enough. my memory for these things doesn't stretch back that far. |
@jbqubit U need to modify 2 additional resistors. I updated your post above |
Thanks @gkasprow!
So a strap from accessible board ground to the front panel? |
Yes, you can do such a strap with a piece of wire. |
Thanks everyone. I've created an Errata section of the wiki calling out these patches. |
What's the prospect for applying patches to existing Urukul v1.3 to fix the most important problems addressed in the v1.4 roll? There's many dozens of these boards in circulation. It would be nice to have a repair path that addresses the most critical bugs without replacing the boards.
From #31 v1.3 -> v1.4 the fixes are
I don't have a clear picture of the v1.2 -> v1.3 mods. What are the prospects for similar patching?
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