Merge pull request #172 from sifive/mcycle-rv32

Retry if mcycle overflow when get cycle
sifive · Aug 28, 2019 · fa83e2a · fa83e2a
2 parents 9329a08 + 9440323
commit fa83e2a
Showing 1 changed file with 9 additions and 6 deletions.
diff --git a/src/drivers/riscv_cpu.c b/src/drivers/riscv_cpu.c
@@ -471,12 +471,15 @@ unsigned long long __metal_driver_cpu_mcycle_get(struct metal_cpu *cpu) {
 #if __riscv_xlen == 32
     unsigned long hi, hi1, lo;
 
-    __asm__ volatile("csrr %0, mcycleh" : "=r"(hi));
-    __asm__ volatile("csrr %0, mcycle" : "=r"(lo));
-    __asm__ volatile("csrr %0, mcycleh" : "=r"(hi1));
-    if (hi == hi1) {
-        val = ((unsigned long long)hi << 32) | lo;
-    }
+    do {
+        __asm__ volatile("csrr %0, mcycleh" : "=r"(hi));
+        __asm__ volatile("csrr %0, mcycle" : "=r"(lo));
+        __asm__ volatile("csrr %0, mcycleh" : "=r"(hi1));
+        /* hi != hi1 means mcycle overflow during we get value,
+         * so we must retry. */
+    } while (hi != hi1);
+
+    val = ((unsigned long long)hi << 32) | lo;
 #else
     __asm__ volatile("csrr %0, mcycle" : "=r"(val));
 #endif