Add led and switch module

Borrowed from HDMI2USB-misoc-firmware[1].

[1] timvideos/HDMI2USB-litex-firmware#282

Signed-off-by: Joel Stanley <joel@jms.id.au>

firmware/ci.c

@@ -124,6 +124,12 @@ static void help_debug(void)
 #endif
 	ci_puts("  debug dna                      - show Board's DNA");
 	ci_puts("  debug edid                     - dump monitor EDID");
+#ifdef CSR_CAS_BASE
+	ci_puts("  debug cas leds <value>         - change the status LEDs");
+	ci_puts("  debug cas switches             - read the control switches status");
+	ci_puts("  debug cas buttons read         - read the control buttons status");
+	ci_puts("  debug cas buttons clear        - clear any asserted buttons status");
+#endif
 }
 
 static void ci_help(void)
@@ -782,6 +788,17 @@ void ci_service(void)
 #endif
 			if(found == 0)
 				ci_printf("%s port has no EDID capabilities\r\n", token);
+#ifdef CSR_CAS_BASE
+		} else if(strcmp(token, "cas") == 0) {
+			token = get_token(&str);
+			if(strcmp(token, "leds") == 0) {
+				token = get_token(&str);
+				cas_leds_out_write(atoi(token));
+			}
+			else if(strcmp(token, "switches") == 0) {
+				printf("%X\r\n", (int)cas_switches_in_read());
+			}
+#endif
 		} else
 			help_debug();
 	} else {

gateware/cas.py

@@ -0,0 +1,75 @@
+"""
+Module which allows control via buttons and switches and status reporting via
+LEDs.
+"""
+
+from litex.build.generic_platform import ConstraintError
+
+from litex.soc.interconnect.csr import AutoCSR
+from litex.soc.interconnect.csr_eventmanager import *
+from litex.gen.genlib.misc import WaitTimer
+
+from litex.soc.cores.gpio import GPIOIn, GPIOOut
+
+class ControlAndStatus(Module, AutoCSR):
+    def __init__(self, platform, clk_freq):
+
+        # Work out how many LEDs this board has
+        user_leds = []
+        while True:
+            try:
+                user_leds.append(platform.request("user_led", len(user_leds)))
+            except ConstraintError:
+                break
+
+        if user_leds:
+            leds = Signal(len(user_leds))
+            self.submodules.leds = GPIOOut(leds)
+            for i in range(0, len(user_leds)):
+                self.comb += [
+                    user_leds[i].eq(leds[i]),
+                ]
+
+        # Work out how many switches this board has
+        user_sws = []
+        while True:
+            try:
+                user_sws.append(platform.request("user_sw", len(user_sws)))
+            except ConstraintError:
+                break
+
+        if user_sws:
+            switches = Signal(len(user_sws))
+            self.submodules.switches = GPIOIn(switches)
+            for i in range(0, len(user_sws)):
+                self.comb += [
+                    switches[i].eq(~user_sws[i]),
+                ]
+
+        # Work out how many push buttons this board has
+        user_btns = []
+        while True:
+            try:
+                user_btns.append(platform.request("user_btn", len(user_btns)))
+            except ConstraintError:
+                break
+
+        if user_btns:
+            self.submodules.buttons_ev = EventManager()
+
+            _10ms = int(clk_freq*(10e-3))
+
+            for i in range(0, len(user_btns)):
+                btn_ev = EventSourceProcess()
+                btn_timer = WaitTimer(_10ms)
+
+                setattr(self.buttons_ev, "btn_ev{}".format(i), btn_ev)
+
+                self.comb += [
+                    btn_timer.wait.eq(user_btns[i]),
+                    btn_ev.trigger.eq(~btn_timer.done),
+                ]
+
+                self.submodules += [btn_timer]
+
+            self.buttons_ev.finalize()

minispartan6_base.py

@@ -29,6 +29,7 @@
 
 from gateware import dna
 from gateware import firmware
+from gateware import cas
 
 def csr_map_update(csr_map, csr_peripherals):
   csr_map.update(dict((n, v) for v, n in enumerate(csr_peripherals, start=max(csr_map.values()) + 1)))
@@ -88,6 +89,7 @@ class BaseSoC(SoCSDRAM):
         "spiflash",
         "ddrphy",
         "dna",
+        "cas",
     )
     csr_map_update(SoCSDRAM.csr_map, csr_peripherals)
 
@@ -104,6 +106,7 @@ def __init__(self, platform, **kwargs):
             **kwargs)
         self.submodules.crg = _CRG(platform, clk_freq)
         self.submodules.dna = dna.DNA()
+        self.submodules.cas = cas.ControlAndStatus(platform, clk_freq)
 
         self.submodules.spiflash = spi_flash.SpiFlash(
             platform.request("spiflash2x"), dummy=platform.spiflash_read_dummy_bits, div=platform.spiflash_clock_div)