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ABI: Pass aggregates by value on AIX #131208

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merged 3 commits into from
Oct 11, 2024
Merged

ABI: Pass aggregates by value on AIX #131208

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7d27ceb
Add AIX Calling Convention
Oct 3, 2024
d09e27d
update call
Oct 3, 2024
e502a7f
add aix aggregate test
Oct 8, 2024
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16 changes: 13 additions & 3 deletions compiler/rustc_target/src/abi/call/powerpc64.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ use crate::spec::HasTargetSpec;
enum ABI {
ELFv1, // original ABI used for powerpc64 (big-endian)
ELFv2, // newer ABI used for powerpc64le and musl (both endians)
AIX, // used by AIX OS, big-endian only
}
use ABI::*;

Expand All @@ -23,9 +24,9 @@ where
C: HasDataLayout,
{
arg.layout.homogeneous_aggregate(cx).ok().and_then(|ha| ha.unit()).and_then(|unit| {
// ELFv1 only passes one-member aggregates transparently.
// ELFv1 and AIX only passes one-member aggregates transparently.
// ELFv2 passes up to eight uniquely addressable members.
if (abi == ELFv1 && arg.layout.size > unit.size)
if ((abi == ELFv1 || abi == AIX) && arg.layout.size > unit.size)
|| arg.layout.size > unit.size.checked_mul(8, cx).unwrap()
{
return None;
Expand Down Expand Up @@ -55,8 +56,15 @@ where
return;
}

// The AIX ABI expect byval for aggregates
// See https://github.com/llvm/llvm-project/blob/main/clang/lib/CodeGen/Targets/PPC.cpp.
if !is_ret && abi == AIX {
arg.pass_by_stack_offset(None);
return;
}

// The ELFv1 ABI doesn't return aggregates in registers
if is_ret && abi == ELFv1 {
if is_ret && (abi == ELFv1 || abi == AIX) {
arg.make_indirect();
return;
}
Expand Down Expand Up @@ -93,6 +101,8 @@ where
{
let abi = if cx.target_spec().env == "musl" {
ELFv2
} else if cx.target_spec().os == "aix" {
AIX
} else {
match cx.data_layout().endian {
Endian::Big => ELFv1,
Expand Down
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