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Fix some misleading target feature aliases #103750

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Nov 16, 2022
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Fix some misleading target feature aliases #103750

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d7152f8
Allow actual AVX512-related feature names in the case of some mislead…
calebzulawski Oct 30, 2022
1122400
Update compiler/rustc_codegen_llvm/src/llvm_util.rs
calebzulawski Nov 12, 2022
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8 changes: 4 additions & 4 deletions compiler/rustc_codegen_gcc/src/lib.rs
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Expand Up @@ -315,10 +315,10 @@ pub fn target_features(sess: &Session, allow_unstable: bool) -> Vec<Symbol> {
false
}
/*
adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512gfni,
avx512ifma, avx512pf, avx512vaes, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpclmulqdq,
avx512vpopcntdq, bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, xsave, xsavec, xsaveopt, xsaves
adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512ifma,
avx512pf, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpopcntdq,
bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, gfni, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm,
sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, vaes, vpclmulqdq, xsave, xsavec, xsaveopt, xsaves
Comment on lines +318 to +321
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I feel almost like these should be sorted by theme rather than alphabetical, but that can happen some other day.

*/
//false
})
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3 changes: 3 additions & 0 deletions compiler/rustc_codegen_llvm/src/llvm_util.rs
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Expand Up @@ -163,6 +163,9 @@ pub fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]
("x86", "rdrand") => smallvec!["rdrnd"],
("x86", "bmi1") => smallvec!["bmi"],
("x86", "cmpxchg16b") => smallvec!["cx16"],
// FIXME: These aliases are misleading, and should be removed before avx512_target_feature is
// stabilized. They must remain until std::arch switches off them.
// rust#100752
("x86", "avx512vaes") => smallvec!["vaes"],
("x86", "avx512gfni") => smallvec!["gfni"],
("x86", "avx512vpclmulqdq") => smallvec!["vpclmulqdq"],
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3 changes: 3 additions & 0 deletions compiler/rustc_codegen_ssa/src/target_features.rs
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Expand Up @@ -179,6 +179,7 @@ const X86_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[
("f16c", Some(sym::f16c_target_feature)),
("fma", None),
("fxsr", None),
("gfni", Some(sym::avx512_target_feature)),
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It's honestly kind of weird that this isn't prefixed v for vgfni like the other features.

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I think it's because the v prefix implies VEX- or EVEX-encoded instructions (e.g. VGF2P8AFFINEQB), but GFNI also introduces plain SSE instructions (e.g. GF2P8AFFINEQB). This is the same distinction as PCLMULQDQ vs VPCLMULQDQ or AES vs VAES for example, but the difference there is the different encodings have separate CPUID flags, whereas GFNI has just one.

("lzcnt", None),
("movbe", Some(sym::movbe_target_feature)),
("pclmulqdq", None),
Expand All @@ -195,6 +196,8 @@ const X86_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[
("sse4a", Some(sym::sse4a_target_feature)),
("ssse3", None),
("tbm", Some(sym::tbm_target_feature)),
("vaes", Some(sym::avx512_target_feature)),
("vpclmulqdq", Some(sym::avx512_target_feature)),
("xsave", None),
("xsavec", None),
("xsaveopt", None),
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