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Rollup merge of #91518 - luojia65:rustdoc-riscv-arch, r=GuillaumeGomez
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Add readable rustdoc display for RISC-V target

This pull request adds a human readable rustdoc display for RISC-V architecture. Target configuration marked as `#[cfg(target_arch = "riscv32")]` or `#[cfg(target_arch = "riscv64")]` are pretty formatted like `RISC-V RV32` and `RISC-V RV64` in Rust docs.

Before:

![图片](https://user-images.githubusercontent.com/40385009/152681944-58d758ae-ac4f-412b-b70c-1e673a2a071e.png)

After:

![图片](https://user-images.githubusercontent.com/40385009/152681923-91d5fe75-c3b2-4ac2-865c-54eac0aefe8d.png)
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Dylan-DPC authored May 11, 2022
2 parents f296b9a + 39d99a1 commit 2af6677
Showing 1 changed file with 2 additions and 0 deletions.
2 changes: 2 additions & 0 deletions src/librustdoc/clean/cfg.rs
Original file line number Diff line number Diff line change
Expand Up @@ -517,6 +517,8 @@ impl<'a> fmt::Display for Display<'a> {
"msp430" => "MSP430",
"powerpc" => "PowerPC",
"powerpc64" => "PowerPC-64",
"riscv32" => "RISC-V RV32",
"riscv64" => "RISC-V RV64",
"s390x" => "s390x",
"sparc64" => "SPARC64",
"wasm32" | "wasm64" => "WebAssembly",
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