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Why is it UartPeripheral which takes no pins, but I2C which does take pins? #140

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jonathanpallant opened this issue Sep 27, 2021 · 2 comments
Closed

Why is it UartPeripheral which takes no pins, but I2C which does take pins? #140

jonathanpallant opened this issue Sep 27, 2021 · 2 comments

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@jonathanpallant
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See also #117

@ithinuel ithinuel mentioned this issue Apr 22, 2023
Merged
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules.
f3b3e65 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules.
29327df 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules.
bca414c 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules and related changes.
488dc92 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules and related changes.
f2f379b 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules and related changes.
8586634 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules and related changes.
00b669b 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules and related changes.
d3aaef3 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules and related changes.
db16d16 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 22, 2023
@ithinuel
Overhaul pin modules and related changes.
06db7b7 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 24, 2023
@ithinuel
Overhaul pin modules and related changes.
8422a7c 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556

# Conflicts:
#	rp2040-hal/src/gpio/mod.rs
ithinuel added a commit to ithinuel/rp-hal that referenced this issue Apr 27, 2023
@ithinuel
Overhaul pin modules and related changes.
bcb8ece 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue May 4, 2023
@ithinuel
Overhaul pin modules and related changes.
2a25aec 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue May 16, 2023
@ithinuel
Overhaul pin modules and related changes.
601d01b 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556

# Conflicts:
#	rp2040-hal/src/spi.rs
ithinuel added a commit to ithinuel/rp-hal that referenced this issue May 16, 2023
@ithinuel
Overhaul pin modules and related changes.
45cf35b 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue May 20, 2023
@ithinuel
Overhaul pin modules and related changes.
478d12b 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue May 21, 2023
@ithinuel
Overhaul pin modules and related changes.
539ea83 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit to ithinuel/rp-hal that referenced this issue May 21, 2023
@ithinuel
Overhaul pin modules and related changes.
be0a95d 
- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: rp-rs#140, rp-rs#446, rp-rs#481, rp-rs#485, rp-rs#556
ithinuel added a commit that referenced this issue May 29, 2023
@ithinuel @thejpster @jannic
Rework GPIO API and fix a few inconsistencies (#585)
b087c0c 
* Leverage typelevel implementation in i2c, pwm (and a little bit in uart).

This notably makes the documentation more readable.

* Use an enum for core identification

* Overhaul pin modules and related changes.

- Added `AdcPin` wrapper to disable digital function for ADC operations
- Added `Sealed` supertrait to `PIOExt`
- Added pins to `Spi` to fix inconsistencies in gpio bounds in peripheral (i2c, uart, spi)
- Merge DynPin and Pin into Pin. The type class used in Pin now have a runtime variant allowing for
  the creation of uniform array of pins (eg: `[Pin<DynPinId, PinFnSio, PullDown>]`).
- Fix miss defined ValidPinMode bound allowing any Bank0 pin to be Xip and any Qspi pin to be any
  other function (except for clock).
- Use `let _ = ` to ignore result rather than `.ok();` as this gives a false sense the result is
  checked.

Addresses: #140, #446, #481, #485, #556

* Address first review round from @thejpster.

* Add a few inline to enable better optimisation.

* Expand documentation for the `Adc`

Co-authored-by: Jonathan 'theJPster' Pallant <github@thejpster.org.uk>

* Refactor the ADC module and remove redundant ts_en.set_bit()

- The channel types and their traits impl have been moved to the top of the
file and reassembled following the "Type -> impl Trait for Type" pattern.
- The temperature sensor bias was enabled twice, `enable_temp_sensor` and
  in the Adc::read function. The latter has now been removed because reading
  the Temp channel requires to call `enable_temp_sensor` anyway.

* Spacersssss :) and unicity -> uniqueness

* Add sio bypass when pin is in Sio Function

* Rename `DontInvert` to `Normal`

* Prevent the creation of multiple instances of TempSensor

* Add missing updates on on-target-tests

* rename `PullBoth` to the more accurate `PullBusKeep`

* Enable dyn-pin to be used with peripherals

* update deprecation notice.

* Add `try_into_function` for dynpin'ed Pins.

* Fix some doc warnings

* Implement `PinGroup`

* Update type-level documentation.

There was too many changes required to keep it in sync with the current
implementation. However, this is not required to understand the essence
of the type-level techniques. Therefore it is less maintenance costly to
forward the reader to the upstream of the idea where the documentation is
already excellent.

* rename `Pin::into()` to `Pin::into_typestate()` to avoid conflicts with `Into::into`

* Update rp2040-hal/src/gpio/mod.rs

Co-authored-by: Jan Niehusmann <jan@gondor.com>

* Remove unused NoneT and fix AnyKind documentation's link

* Remove remaining occurences of "into_mode" in examples

* Enhance documentation

* doc: fix placeholder names

* Rename `into_typestate` to the more explicit `reconfigure`.

---------

Co-authored-by: Jonathan 'theJPster' Pallant <github@thejpster.org.uk>
Co-authored-by: Jan Niehusmann <jan@gondor.com>
@jannic
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jannic commented Jul 5, 2024

This has been fixed by #585.

@jannic jannic closed this as completed Jul 5, 2024
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