Microsoft Visual Studio 2019 for C++ Linux Development demo applications to get started with embedded C++ development for Intel SoC-FPGAs
These three C++ Demo projects show how to interact with FPGA Soft-IP- and Linux Devices on an embedded Linux. Also, it is demonstrated how to use the Intel hwlib to change for instance the FPGA configuration.
I designed it to give users of my embedded Linux "rsyocto" a starting point in C++ development.
- GetStarted
- Control the HPS (Hard processor system) LED and Push button of a Terasic DE10 development board with the Intel hwlib (HPS peripheral library)
- Using the General-Purpose I/O (GPIO) interface modules of Intel SoC-FPGAs with Linux
- Configure the HPS_LEY as output
- Configure the HPS_KEY as input
- Read the HPS_KEY and write the value to the HPS_LED and console
- Control the HPS (Hard processor system) LED and Push button of a Terasic DE10 development board with the Intel hwlib (HPS peripheral library)
- HPSbridgeDemo
- Access the HPS to FPGA Lightweight (LW2FPGA; lwhps2fpga) Bridge to interact with FPGA Soft-IP
- Access the Bridge Memory interface
- Read the UNIQUE ID over the LW2FPGA Bridge
- Count the FPGA LEDs and FPGA 7Segment Display Soft-IP up
- Read the FPGA Push Buttons and FPGA Switches
- Access the HPS to FPGA Lightweight (LW2FPGA; lwhps2fpga) Bridge to interact with FPGA Soft-IP
- WriteFPGAconfig
- Write the FPGA Configuration of an Intel Cyclone V SoC-FPGA via the FPGA Manager and the Intel hwlib (HPS peripheral library)
- Read the MSEL switch position of the development board
- Read the status of the FPGA fabric
- Change the FPGA configuration
- Change the FPGA configuration back to the original version
- Write the FPGA Configuration of an Intel Cyclone V SoC-FPGA via the FPGA Manager and the Intel hwlib (HPS peripheral library)
- ADCdemo
- Read the Channel 0 of the Analog Device LTC2308 12-bit ADC connected via a Soft-IP to the Lightweight HPS-to-FPGA Bridge
- Configure the HPS_LED as output
- Configure the ADC interface
- Read an ADC value, convert it to voltage and print it out
- Read the Channel 0 of the Analog Device LTC2308 12-bit ADC connected via a Soft-IP to the Lightweight HPS-to-FPGA Bridge
-
Install Microsoft Visual Studio for Linux development
- Please consider my following guide
-
Clone this repository
-
Open the "rsYoctoExamples.sln" Microsoft Visual Studio Solution file to start Visual Studio
-
Connect your Intel SoC-FPGA development board to the network and boot rsyocto (for more information)
-
Connect the Visual Studio remote debugger (gdb-server) to the development board
- by selecting inside Visual Studio
Tools/Options/Cross Platform
the "Remove"-Button and then "Add"-Button to insert the credentials of your board- Platform:
ARM
- Host Name:
IPv4-Address of your Board
- Port:
22
- User name:
root
- Authentication type:
Password
- Password:
eit
- Platform:
- by selecting inside Visual Studio
-
Choose the project to debug by right clicking of the project name inside the Solution Explorer and selecting Set as StartUp project as shown here:
-
Select your FPGA board for the Demo
- The pre-installed demo contains a simple stop watch written as FreeRTOS task
- Choice your FPGA development board for this demo due to specifying "DEMO_SELECTED_BOARD" in "BoardConf.h"
#define DEMO_DEVBOARD_DE10NANO 1 // Terasic DE10 Nano #define DEMO_DEVBOARD_DE10STD 2 // Terasic DE10 Standard #define DEMO_DEVBOARD_DE0NANOSOC 3 // Terasic DE0 Nano SoC #define DEMO_DEVBOARD_UNKNOWN 0 // Select your Development Board #define DEMO_SELECTED_BOARD DEMO_DEVBOARD_DE10NANO #if DEMO_SELECTED_BOARD == DEMO_DEVBOARD_UNKNOWN #error "Please select your development board!" #endif
-
Press the debug button to start the debugging session
- rsyocto; Robin Sebastian,M.Sc. (LinkedIn)
LinuxVSCppFPGA and rsyocto are self-developed projects in which no other companies are involved. It is specifically designed to serve students and the Linux/FPGA open-source community with its publication on GitHub and its open-source MIT license. In the future, rsyocto will retain its open-source status and it will be further developed.
Due to the enthusiasm of commercial users, special features for industrial, scientific and automotive applications were developed and ready for the implementation in a highly optimazed closed commercial version. Partnerships as an embedded SoC-FPGA design service to fulfil these specific commercial requirements are offered. It should help, besides students with the rsyocto open-source version, commercial users, as well.
For commercial users, please visit the rsyocto embedded service provider website: rsyocto.com