updated schemavalidator for ISA checks

Close #10 Close #11 Close #12 Close #13
riscv-software-src · Mar 25, 2020 · fc9e3ef · fc9e3ef
1 parent b768860
commit fc9e3ef
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Showing 3 changed files with 7 additions and 6 deletions.
diff --git a/examples/rv32i_isa.yaml b/examples/rv32i_isa.yaml
@@ -1,7 +1,8 @@
-ISA: RV32I
+ISA: RV32IMAFCZicsr_Zifencei
+User_Spec_Version: '2.3'
 supported_xlen: [32]
 misa:
-  reset-val: 0x40000100
+  reset-val: 0x40001125
   rv32:
     implemented: true
     mxl:
@@ -11,7 +12,7 @@ misa:
     extensions:
       implemented: true
       type:
-        ro_constant: [0x100]
+        ro_constant: [0x1125]
   rv64:
     implemented: false
 mvendorid:

diff --git a/riscv_config/__init__.py b/riscv_config/__init__.py
@@ -1,3 +1,3 @@
 from pkgutil import extend_path
 __path__ = extend_path(__path__, __name__)
-__version__ = "1.0.2"
+__version__ = "2.0.0"
diff --git a/riscv_config/schemaValidator.py b/riscv_config/schemaValidator.py
@@ -164,11 +164,11 @@ def _check_with_capture_isa_specifics(self, field, value):
             if 'S' in value and not 'U' in value:
                 self._error(field, "S cannot exist without U.")
             if 'Z' in value and not self.document['User_Spec_Version'] == "2.3":
-                self._error(field, "Z is not supported in the given version.")
+                self._error(field, "Z is not supported in the User Spec given version.")
         else:
                 self._error(field, "Neither of E or I extensions are present")
         #ISA encoding for future use.
-        for x in "ACDEFGIJLMNPQSTUVXZ":
+        for x in "ABCDEFHIJLMNPQSTUVX":
             if (x in ext):
                 extension_enc[25 - int(ord(x) - ord('A'))] = "1"
         extensions = int("".join(extension_enc), 2)