Hypervisor Extension enable issue

[Allen-StarFive]

Our DUT hardware supports H extension, so we want to enable MISA.H = 1.
But Reference-sail_c_simulator doesn't support it at present, which causes some test cases to fail.
How to configure yaml files in this case?

Example in attach files:
Dubhe-90.zip

Test case fail cause analysis:

In function <Mxcpt_sig_sv> read misa to t1, Our DUT return misa=0x80000000001411AD, which cause branch unsatisfied.
But SAIL always return misa=0x800000000014112D, which doesn't match H extension.

[allenjbaum]

The short answer is that Hypervisor has not been implemented in Sail yet, so you can't configure it.
The people who understand Sail and the people that understand the H-extension have a very small overlap.
There are some changes being made to the Sail model that should make implementation simpler... but not simple

[Allen-StarFive]

what's your suggestion for next step? Can we just waive these test failures?

[allenjbaum]

The effort to add this into Sail is huge, and there are lots of other extensions backed up behind it. I would use Spike as a reference to start with, but I don't know if there are tool chinese to support H-extension, and I donb't know if riscv-confiig supports it (that is a much easier problem), and because of all of this, we don't have tests, There are tests out there (riscv-tests probably has some and they're designed for spike, and Imperas has both models and tests), but they're not in arch-test format, and the coverage is likely pretty poor. I would start there, or with Imperas tests.

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On Sun, Dec 3, 2023 at 5:59 PM Yilun Xie ***@***.***> wrote: what's your suggestion for next step? Can we just waive these test failures? — Reply to this email directly, view it on GitHub <#414 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AHPXVJWL4ATKNYVLIB6OZBDYHUU77AVCNFSM6AAAAABAAOACVOVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMYTQMZXG4ZDAOBXGM> . You are receiving this because you commented.Message ID: ***@***.***>

[Allen-StarFive]

I have replaced SAIL with Spike and run test again. It looks all tests have passed.
And I have submitted the report to riscv-arch-test-reports (riscv-non-isa/riscv-arch-test-reports#6).
Would you please help to take a look?

[allenjbaum]

Wow, I just reread my original comments, and its full of weird typos.
OK, I can merge this - but note that this didn't actually run any hypervisor tests!