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crypto: stm32/hash - Add power management support
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Adding pm and pm_runtime support to STM32 HASH.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ldebieve @herbertx
ldebieve authored and herbertx committed Jul 8, 2018
1 parent 65f9aa3 commit 8b4d566
Showing 1 changed file with 71 additions and 0 deletions.
71 changes: 71 additions & 0 deletions drivers/crypto/stm32/stm32-hash.c
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Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,7 @@
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>

#include <crypto/engine.h>
Expand Down Expand Up @@ -121,6 +122,8 @@ enum stm32_hash_data_format {
#define HASH_QUEUE_LENGTH 16
#define HASH_DMA_THRESHOLD 50

#define HASH_AUTOSUSPEND_DELAY 50

struct stm32_hash_ctx {
struct crypto_engine_ctx enginectx;
struct stm32_hash_dev *hdev;
Expand Down Expand Up @@ -814,12 +817,17 @@ static void stm32_hash_finish_req(struct ahash_request *req, int err)
rctx->flags |= HASH_FLAGS_ERRORS;
}

pm_runtime_mark_last_busy(hdev->dev);
pm_runtime_put_autosuspend(hdev->dev);

crypto_finalize_hash_request(hdev->engine, req, err);
}

static int stm32_hash_hw_init(struct stm32_hash_dev *hdev,
struct stm32_hash_request_ctx *rctx)
{
pm_runtime_get_sync(hdev->dev);

if (!(HASH_FLAGS_INIT & hdev->flags)) {
stm32_hash_write(hdev, HASH_CR, HASH_CR_INIT);
stm32_hash_write(hdev, HASH_STR, 0);
Expand Down Expand Up @@ -967,6 +975,8 @@ static int stm32_hash_export(struct ahash_request *req, void *out)
u32 *preg;
unsigned int i;

pm_runtime_get_sync(hdev->dev);

while (!(stm32_hash_read(hdev, HASH_SR) & HASH_SR_DATA_INPUT_READY))
cpu_relax();

Expand All @@ -982,6 +992,9 @@ static int stm32_hash_export(struct ahash_request *req, void *out)
for (i = 0; i < HASH_CSR_REGISTER_NUMBER; i++)
*preg++ = stm32_hash_read(hdev, HASH_CSR(i));

pm_runtime_mark_last_busy(hdev->dev);
pm_runtime_put_autosuspend(hdev->dev);

memcpy(out, rctx, sizeof(*rctx));

return 0;
Expand All @@ -1000,6 +1013,8 @@ static int stm32_hash_import(struct ahash_request *req, const void *in)

preg = rctx->hw_context;

pm_runtime_get_sync(hdev->dev);

stm32_hash_write(hdev, HASH_IMR, *preg++);
stm32_hash_write(hdev, HASH_STR, *preg++);
stm32_hash_write(hdev, HASH_CR, *preg);
Expand All @@ -1009,6 +1024,9 @@ static int stm32_hash_import(struct ahash_request *req, const void *in)
for (i = 0; i < HASH_CSR_REGISTER_NUMBER; i++)
stm32_hash_write(hdev, HASH_CSR(i), *preg++);

pm_runtime_mark_last_busy(hdev->dev);
pm_runtime_put_autosuspend(hdev->dev);

kfree(rctx->hw_context);

return 0;
Expand Down Expand Up @@ -1482,6 +1500,13 @@ static int stm32_hash_probe(struct platform_device *pdev)
return ret;
}

pm_runtime_set_autosuspend_delay(dev, HASH_AUTOSUSPEND_DELAY);
pm_runtime_use_autosuspend(dev);

pm_runtime_get_noresume(dev);
pm_runtime_set_active(dev);
pm_runtime_enable(dev);

hdev->rst = devm_reset_control_get(&pdev->dev, NULL);
if (!IS_ERR(hdev->rst)) {
reset_control_assert(hdev->rst);
Expand Down Expand Up @@ -1522,6 +1547,8 @@ static int stm32_hash_probe(struct platform_device *pdev)
dev_info(dev, "Init HASH done HW ver %x DMA mode %u\n",
stm32_hash_read(hdev, HASH_VER), hdev->dma_mode);

pm_runtime_put_sync(dev);

return 0;

err_algs:
Expand All @@ -1535,6 +1562,9 @@ static int stm32_hash_probe(struct platform_device *pdev)
if (hdev->dma_lch)
dma_release_channel(hdev->dma_lch);

pm_runtime_disable(dev);
pm_runtime_put_noidle(dev);

clk_disable_unprepare(hdev->clk);

return ret;
Expand All @@ -1543,11 +1573,16 @@ static int stm32_hash_probe(struct platform_device *pdev)
static int stm32_hash_remove(struct platform_device *pdev)
{
static struct stm32_hash_dev *hdev;
int ret;

hdev = platform_get_drvdata(pdev);
if (!hdev)
return -ENODEV;

ret = pm_runtime_get_sync(hdev->dev);
if (ret < 0)
return ret;

stm32_hash_unregister_algs(hdev);

crypto_engine_exit(hdev->engine);
Expand All @@ -1559,16 +1594,52 @@ static int stm32_hash_remove(struct platform_device *pdev)
if (hdev->dma_lch)
dma_release_channel(hdev->dma_lch);

pm_runtime_disable(hdev->dev);
pm_runtime_put_noidle(hdev->dev);

clk_disable_unprepare(hdev->clk);

return 0;
}

#ifdef CONFIG_PM
static int stm32_hash_runtime_suspend(struct device *dev)
{
struct stm32_hash_dev *hdev = dev_get_drvdata(dev);

clk_disable_unprepare(hdev->clk);

return 0;
}

static int stm32_hash_runtime_resume(struct device *dev)
{
struct stm32_hash_dev *hdev = dev_get_drvdata(dev);
int ret;

ret = clk_prepare_enable(hdev->clk);
if (ret) {
dev_err(hdev->dev, "Failed to prepare_enable clock\n");
return ret;
}

return 0;
}
#endif

static const struct dev_pm_ops stm32_hash_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
pm_runtime_force_resume)
SET_RUNTIME_PM_OPS(stm32_hash_runtime_suspend,
stm32_hash_runtime_resume, NULL)
};

static struct platform_driver stm32_hash_driver = {
.probe = stm32_hash_probe,
.remove = stm32_hash_remove,
.driver = {
.name = "stm32-hash",
.pm = &stm32_hash_pm_ops,
.of_match_table = stm32_hash_of_match,
}
};
Expand Down

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