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feat: configurable clock phase and polarity for sync spi (#200)
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andjordan authored Oct 18, 2023
1 parent 1ce52f9 commit cbf6d68
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Showing 2 changed files with 4 additions and 2 deletions.
4 changes: 2 additions & 2 deletions hal_st/synchronous_stm32fxxx/SynchronousSpiMasterStm.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -17,8 +17,8 @@ namespace hal
spiHandle.Init.Mode = SPI_MODE_MASTER;
spiHandle.Init.Direction = SPI_DIRECTION_2LINES;
spiHandle.Init.DataSize = SPI_DATASIZE_8BIT;
spiHandle.Init.CLKPolarity = SPI_POLARITY_LOW;
spiHandle.Init.CLKPhase = SPI_PHASE_1EDGE;
spiHandle.Init.CLKPolarity = config.polarityLow ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH;
spiHandle.Init.CLKPhase = config.phase1st ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE;
spiHandle.Init.NSS = SPI_NSS_SOFT;
spiHandle.Init.BaudRatePrescaler = config.baudRatePrescaler;
spiHandle.Init.FirstBit = config.msbFirst ? SPI_FIRSTBIT_MSB : SPI_FIRSTBIT_LSB;
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2 changes: 2 additions & 0 deletions hal_st/synchronous_stm32fxxx/SynchronousSpiMasterStm.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,8 @@ namespace hal
{}

bool msbFirst = true;
bool polarityLow = true;
bool phase1st = true;
uint32_t baudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
};

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