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dt-bindings/irq: Add binding for Freescale IRQSTEER multiplexer
This adds the DT binding for the Freescale IRQSTEER interrupt multiplexer found in the i.MX8 familiy SoCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.txt
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Freescale IRQSTEER Interrupt multiplexer | ||
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Required properties: | ||
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- compatible: should be: | ||
- "fsl,imx8m-irqsteer" | ||
- "fsl,imx-irqsteer" | ||
- reg: Physical base address and size of registers. | ||
- interrupts: Should contain the parent interrupt line used to multiplex the | ||
input interrupts. | ||
- clocks: Should contain one clock for entry in clock-names | ||
see Documentation/devicetree/bindings/clock/clock-bindings.txt | ||
- clock-names: | ||
- "ipg": main logic clock | ||
- interrupt-controller: Identifies the node as an interrupt controller. | ||
- #interrupt-cells: Specifies the number of cells needed to encode an | ||
interrupt source. The value must be 1. | ||
- fsl,channel: The output channel that all input IRQs should be steered into. | ||
- fsl,irq-groups: Number of IRQ groups managed by this controller instance. | ||
Each group manages 64 input interrupts. | ||
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Example: | ||
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interrupt-controller@32e2d000 { | ||
compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer"; | ||
reg = <0x32e2d000 0x1000>; | ||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>; | ||
clock-names = "ipg"; | ||
fsl,channel = <0>; | ||
fsl,irq-groups = <1>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; |