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Dashboard revision March 2021 #356

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# OpenHW Project Dashboard

Last Update Feb 8, 2021
Last Update March 5, 2021

## Status Key
PPL = Preliminary Project Launch
**PC = Project Concept** (*formerly Preliminary Project Launch, PPL*)
  ↓
PL = Project Launch
**PL = Project Launch**
  ↓
PPA = Project Plan Approved
**PA = Plan Approved** (*formerly Project Plan Approved, PPA*)
  ↓
PC = Project Completed
**PF = Project Freeze** (*formerly Project Completed, PC*)


## Completed Projects (PC)
## Completed Projects at Project Freeze, PF

| Name | Status | Task Group | Technical Project Leader(s) | PM (if designated) | OpenHW repo(s) | EF Project | ECLIPSE CQ | PPL | PL |PPA | PC |Project Proposal (or Readme File) |
| Name | Status | Task Group | Technical Project Leader(s) | PM (if designated) | OpenHW repo(s) | EF Project | ECLIPSE CQ | PC | PL |PA | PF |Project Proposal (or Readme File) |
|---------- |-------- |----------------------------- |---------------------------------------------- |-------------------- |-------------- | ----------------- |-------------- |------------ |-------------- |-------------- |-------------- |---------------------------------------------------------------------- |
| CV32E40P | PC | Verification, Cores | [Mike Thompson](https://github.com/orgs/openhwgroup/people/MikeOpenHWGroup), [Davide Schiavone](https://github.com/orgs/openhwgroup/people/davideschiavone), [Arjan Binks](https://github.com/orgs/openhwgroup/people/Silabs-ArjanB) | [Mike Thompson](https://github.com/orgs/openhwgroup/people/MikeOpenHWGroup) (verif) | [cv32e40p](https://github.com/openhwgroup/cv32e40p) | CORE-V Cores | [22444](https://dev.eclipse.org/ipzilla/show_bug.cgi?id=22444), [22415](https://dev.eclipse.org/ipzilla/show_bug.cgi?id=22415), [22867](http://dev.eclipse.org/ipzilla/show_bug.cgi?id=22867). [22987](https://dev.eclipse.org/ipzilla/show_bug.cgi?id=22987) | grandfathered | grandfathered | grandfathered |RTL Freeze [REL 1.0.0](https://projects.eclipse.org/projects/openhw.corev/downloads) 2021.01.20(A) | [core-v cv32e40p readme](https://github.com/openhwgroup/cv32e40p/blob/master/README.md) |
| CV32E40P | PF | Verification, Cores | [Mike Thompson](https://github.com/orgs/openhwgroup/people/MikeOpenHWGroup), [Davide Schiavone](https://github.com/orgs/openhwgroup/people/davideschiavone), [Arjan Binks](https://github.com/orgs/openhwgroup/people/Silabs-ArjanB) | [Mike Thompson](https://github.com/orgs/openhwgroup/people/MikeOpenHWGroup) (verif) | [cv32e40p](https://github.com/openhwgroup/cv32e40p) | CORE-V Cores | [22444](https://dev.eclipse.org/ipzilla/show_bug.cgi?id=22444), [22415](https://dev.eclipse.org/ipzilla/show_bug.cgi?id=22415), [22867](http://dev.eclipse.org/ipzilla/show_bug.cgi?id=22867). [22987](https://dev.eclipse.org/ipzilla/show_bug.cgi?id=22987) | grandfathered | grandfathered | grandfathered |RTL Freeze [REL 1.0.0](https://projects.eclipse.org/projects/openhw.corev/downloads) 2021.01.20(A) | [core-v cv32e40p readme](https://github.com/openhwgroup/cv32e40p/blob/master/README.md) |


## Active Projects (have passed PPL)

| Name | Status | Task Group | Technical Project Leader(s) | PM (if designated) | OpenHW repo(s) | EF Project | ECLIPSE CQ | PPL | PL |PPA | Project Proposal (or Readme File) |

## Active Projects which have passed Project Launch, PL

| Name | Status | Task Group | Technical Project Leader(s) | PM (if designated) | OpenHW repo(s) | EF Project | ECLIPSE CQ | PC | PL |PA | Project Proposal (or Readme File) |
|---------- |-------- |----------------------------- |---------------------------------------------- |-------------------- |-------------- | ----------------- |-------------- |------------ |-------------- |-------------- |---------------------------------------------------------------------- |
| CORE-V MCU FPGA | PPA | HW | [Hugh Pollitt Smith](https://github.com/orgs/openhwgroup/people/hpollittsmith) | | [core-v-mcu](https://github.com/openhwgroup/core-v-mcu) | CORE-V Cores | NONE | grandfathered | grandfathered | grandfathered | [core-v mcu readme](https://github.com/openhwgroup/core-v-mcu/blob/master/README.md) |
| CVA6 | PL | Verification, Cores | [Jérôme Quévremont](https://github.com/orgs/openhwgroup/people/jquevremont) | | [cva6](https://github.com/openhwgroup/cva6) | CORE-V Cores | [22416](https://dev.eclipse.org/ipzilla/show_bug.cgi?id=22416) | 20.09.28 (A) | 2021.01.20(A) | TBD | [cva6 ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/CVA6%20preliminary%20project%20proposal.md) |
| FORCE-RISCV | PL | Verification | [Jingliang Wang](https://github.com/Leo-Wang-JL) | | [force-riscv](https://github.com/openhwgroup/force-riscv) | CORE-V Cores | NONE | 20.09.28 (A) | 20.10.26 (A) | TBD | [force-riscv ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/FORCE-RISCV%20ISG%20project%20proposal.md) |
| CORE-V-IDE-CDT | PPL | SW | [Alexander Fedorov](https://github.com/orgs/openhwgroup/people/ruspl-afed) | | [core-v-ide-cdt](https://github.com/openhwgroup/core-v-ide-cdt) | CORE-V Cores | [22867](http://dev.eclipse.org/ipzilla/show_bug.cgi?id=22867) | 20.08.31(A) | TBD | TBD | [core-v-ide-cdt ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/CORE-V%20IDE%20prelminary%20project%20proposal.md) |
| CORE-V GNU GCC TOOLS | PPL | SW | [Jessica Mills](https://github.com/jessicamills) | [Jessica Mills](https://github.com/jessicamills) | [corev-gcc](https://github.com/openhwgroup/corev-gcc) | not under EF | n/a | 20.10.05 (A) | TBD | TBD | [core-v gnu gcc tools ppl](https://github.com/jeremybennett/core-v-docs/blob/jpb-gnu-tools-ppl/program/core-v-gnu-tools-ppl.md) | |
| CORE-V MCU SOC | PPL | HW, Verification | [Tim Saxe](https://github.com/timsaxe), [Davide Schiavone](https://github.com/orgs/openhwgroup/people/davideschiavone), [Hugh Pollitt-Smith](https://github.com/orgs/openhwgroup/people/hpollittsmith) | | [core-v-mcu](https://github.com/openhwgroup/core-v-mcu) | CORE-V Cores | NONE | 20.10.05 (A) | TBD | TBD | [core-v-mcu-soc ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/Preliminary%20project%20proposal%20for%20MCU%20SoC.md) |
| CORE-V LLVM TOOLS | PPL | SW | [Zbigniew Chamski](https://github.com/PicoPET) | | [corev-llvm-project](https://github.com/openhwgroup/corev-llvm-project) | not under EF (tentative) | n/a | 20.11.30 (A) | TBD | TBD | [llvm-toolchain-ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/llvm-toolchain-ppl.md)
| CORE-V FREERTOS | PPL | SW | [Robert Balas](https://github.com/bluewww), [Shteryana Shopova](https://github.com/shteryana), [Olive Chao](https://github.com/olivetreezhao) | [Jeremy Bennett](https://github.com/jeremybennett) (temporary PM) | TBD | not under EF (tentative) | n/a | 20.11.30 (A) | TBD | TBD | [core-v-free-rtos-ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/core-v-free-rtos-ppl.md)
| CORE-V VEC RESEARCH | PPL | University Outreach (UOTG) | [Frank Gurkaynak](https://github.com/gurkaynak), [Mickael Fiorentino](https://github.com/mickaelfiorentino) | [Hugh Pollitt Smith](https://github.com/orgs/openhwgroup/people/hpollittsmith) | TBD | CORE-V Cores | NONE | 20.11.30 (A) | TBD | TBD | [core-v-VEC research ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/PPL%20proposal%20for%20Core-V-VEC%20Research%20Project.md)
| cv32e40pv2 | PPL | Cores, Verification | [John Martin](https://github.com/orgs/openhwgroup/people/jm4rtin) | | TBD | CORE-V Cores | NONE | TBD | TBD | TBD | [cv32e40pv2 ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/CV32E40Pv2%20preliminary%20project%20proposal.md) |
| FORCE-RISCV | PL | Verification | [Jingliang Wang](https://github.com/Leo-Wang-JL) | | [force-riscv](https://github.com/openhwgroup/force-riscv) | CORE-V Cores | NONE | 20.09.28 (A) | 20.10.26 (A) | TBD | [force-riscv pl](https://github.com/openhwgroup/core-v-docs/blob/master/program/FORCE-RISCV%20ISG%20project%20proposal.md) |
| cv32e40s | PL | Cores, Verification | [Oystein Knauserud](https://github.com/silabs-oysteink) | [Oystein Knauserud](https://github.com/silabs-oysteink) | [cv32e40s](https://github.com/openhwgroup/cv32e40s) | CORE-V Cores | NONE | 21.02.22 (A) | 21.02.22 (A) | 21.03.22 (P) | [cv32e40s combined PPL/PL](https://github.com/openhwgroup/core-v-docs/blob/master/program/CV32E40S-PPL.md) |
| cv32e40x | PL | Cores, Verification | [Oystein Knauserud](https://github.com/silabs-oysteink) | [Oystein Knauserud](https://github.com/silabs-oysteink) | [cv32e40x](https://github.com/openhwgroup/cv32e40x) | CORE-V Cores | NONE | 21.02.22 (A) | 21.02.22 (A) | 21.03.22 (P) | [cv32e40x combined PPL/PL](https://github.com/openhwgroup/core-v-docs/blob/master/program/CV32E40X-PPL.md)


## Active Projects which have passed Project Concept, PC

| Name | Status | Task Group | Technical Project Leader(s) | PM (if designated) | OpenHW repo(s) | EF Project | ECLIPSE CQ | PC | PL |PA | Project Proposal (or Readme File) |
|---------- |-------- |----------------------------- |---------------------------------------------- |-------------------- |-------------- | ----------------- |-------------- |------------ |-------------- |-------------- |---------------------------------------------------------------------- |
| CORE-V-IDE-CDT | PC | SW | [Alexander Fedorov](https://github.com/orgs/openhwgroup/people/ruspl-afed) | | [core-v-ide-cdt](https://github.com/openhwgroup/core-v-ide-cdt) | CORE-V Cores | [22867](http://dev.eclipse.org/ipzilla/show_bug.cgi?id=22867) | 20.08.31(A) | TBD | TBD | [core-v-ide-cdt ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/CORE-V%20IDE%20prelminary%20project%20proposal.md) |
| CORE-V GNU GCC TOOLS | PC | SW | [Jessica Mills](https://github.com/jessicamills) | [Jessica Mills](https://github.com/jessicamills) | [corev-gcc](https://github.com/openhwgroup/corev-gcc) | not under EF | n/a | 20.10.05 (A) | TBD | TBD | [core-v gnu gcc tools ppl](https://github.com/jeremybennett/core-v-docs/blob/jpb-gnu-tools-ppl/program/core-v-gnu-tools-ppl.md) | |
| CORE-V MCU SOC | PC | HW, Verification | [Tim Saxe](https://github.com/timsaxe), [Davide Schiavone](https://github.com/orgs/openhwgroup/people/davideschiavone), [Hugh Pollitt-Smith](https://github.com/orgs/openhwgroup/people/hpollittsmith) | | [core-v-mcu](https://github.com/openhwgroup/core-v-mcu) | CORE-V Cores | NONE | 20.10.05 (A) | TBD | TBD | [core-v-mcu-soc ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/Preliminary%20project%20proposal%20for%20MCU%20SoC.md) |
| CORE-V LLVM TOOLS | PC | SW | [Zbigniew Chamski](https://github.com/PicoPET) | | [corev-llvm-project](https://github.com/openhwgroup/corev-llvm-project) | not under EF (tentative) | n/a | 20.11.30 (A) | TBD | TBD | [llvm-toolchain-ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/llvm-toolchain-ppl.md)
| CORE-V FREERTOS | PC | SW | [Robert Balas](https://github.com/bluewww), [Shteryana Shopova](https://github.com/shteryana), [Olive Chao](https://github.com/olivetreezhao) | [Jeremy Bennett](https://github.com/jeremybennett) (temporary PM) | TBD | not under EF (tentative) | n/a | 20.11.30 (A) | TBD | TBD | [core-v-free-rtos-ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/core-v-free-rtos-ppl.md)
| CORE-V VEC RESEARCH | PC | University Outreach (UOTG) | [Frank Gurkaynak](https://github.com/gurkaynak), [Mickael Fiorentino](https://github.com/mickaelfiorentino) | [Hugh Pollitt Smith](https://github.com/orgs/openhwgroup/people/hpollittsmith) | TBD | CORE-V Cores | NONE | 20.11.30 (A) | TBD | TBD | [core-v-VEC research ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/PPL%20proposal%20for%20Core-V-VEC%20Research%20Project.md)
| cv32e40pv2 | PC | Cores, Verification | [John Martin](https://github.com/orgs/openhwgroup/people/jm4rtin) | | TBD | CORE-V Cores | NONE | TBD | TBD | TBD | [cv32e40pv2 ppl](https://github.com/openhwgroup/core-v-docs/blob/master/program/CV32E40Pv2%20preliminary%20project%20proposal.md) |
| Verilator Model | PC | HW, dotted line to SW | [Alfredo Herrera](https://github.com/alfredoh1234) | | TBD | CORE-V Cores | NONE | TBD | TBD | TBD | [Verilator Modeling PPL](https://github.com/openhwgroup/core-v-docs/blob/master/program/verilator-modeling-ppl.md) |

## Potential Projects (have not passed PPL)
| Name | Status | Task Group | Technical Project Leader(s) | PM (if designated) | OpenHW repo(s) | EF Project | ECLIPSE CQ | PPL | PL |PPA | Project Proposal (or Readme File) |
| Name | Status | Task Group | Technical Project Leader(s) | PM (if designated) | OpenHW repo(s) | EF Project | ECLIPSE CQ | PC | PL |PA | Project Proposal (or Readme File) |
|---------- |-------- |----------------------------- |---------------------------------------------- |-------------------- |-------------- | ----------------- |-------------- |------------ |-------------- |-------------- |---------------------------------------------------------------------- |
| cve2 | NONE | Cores, Verification | Joe Circello | Joe Circello | TBD | CORE-V Cores | NONE | TBD | TBD | TBD | |
| Verilator Model | NONE | HW, dotted line to SW | [Alredo Herrera](https://github.com/alfredoh1234) | | TBD | CORE-V Cores | NONE | TBD | TBD | TBD | [draft PPL](https://github.com/openhwgroup/core-v-docs/blob/master/program/verilator-modeling-ppl.md) |
| cve2 | NONE | Cores, Verification | Joe Circello | Joe Circello | TBD | CORE-V Cores | | TBD | TBD | TBD | |