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[NATIVECPU] Report correct memory order capabilities for Native CPU #1527

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merged 1 commit into from
Jun 4, 2024

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@PietroGhg PietroGhg commented Apr 18, 2024

Currently the Native CPU backend implements only UR_MEMORY_ORDER_CAPABILITY_FLAG_RELAXED, but the adapter reports all the memory order capabilities. This PR addressed it by reporting only UR_MEMORY_ORDER_CAPABILITY_FLAG_RELAXED.
intel/llvm PR: intel/llvm#13469
This makes it so the AtomicRef/sub_local.cpp, AtomicRef/atomic_memory_order_acq_rel.cpp and AtomicRef/load_local.cpp tests (that check for the supported memory order capabilities) do not execute the unsupported atomics operations.

@kbenzie kbenzie added the ready to merge Added to PR's which are ready to merge label May 24, 2024
@kbenzie kbenzie merged commit 31ee5d5 into oneapi-src:main Jun 4, 2024
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sarnex pushed a commit to intel/llvm that referenced this pull request Jun 4, 2024
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3 participants