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FPGA: correct 'categories' for hls flow/interfaces code samples #2383

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whitepau
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Existing Sample Changes

Description

Correct 'categories' for hls flow/interfaces code samples so they group together nicely in the sample browser

Type of change

Please delete options that are not relevant. Add a 'X' to the one that is applicable.

  • Bug fix (non-breaking change which fixes an issue)
  • New feature (non-breaking change which adds functionality)
  • Implement fixes for ONSAM Jiras

How Has This Been Tested?

Please describe the tests that you ran to verify your changes. Provide instructions so we can reproduce. Please also list any relevant details for your test configuration

  • Command Line
  • oneapi-cli
  • Visual Studio
  • Eclipse IDE
  • VSCode
  • When compiling the compliler flag "-Wall -Wformat-security -Werror=format-security" was used

No tests as this is a metadata change to group items correctly in the sample browser.

@@ -1,7 +1,7 @@
{
"guid": "7d8482f5-39f1-4cf1-aa2e-a1f72cfc47cb",
"name": "Component Interfaces Comparison",
"categories": ["Toolkit/oneAPI Direct Programming/C++SYCL FPGA/Getting Started Tutorials"],
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@pmpeter1 is it ok to have multiple categories for a code sample? I would like the sample to show up in two places in the sample browser.

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awesome, that's what I did!

"categories": ["Toolkit/Get Started", "Toolkit/oneAPI Direct Programming/C++SYCL/Dense Linear Algebra", "Toolkit/oneAPI Tools/Advisor"],

@yuguen-intel yuguen-intel changed the title correct 'categories' for hls flow/interfaces code samples FPGA: correct 'categories' for hls flow/interfaces code samples Jul 10, 2024
@yuguen-intel yuguen-intel merged commit 23bb205 into oneapi-src:development Jul 11, 2024
jimmytwei added a commit that referenced this pull request Jul 30, 2024
* Update README.md

* Update README.md

* Update README.md

* Update lu_solve_omp_offload_optimized.F90

* FPGA: Revert "Remove fpga_register annotations from fifo_sort" (#2370)

This reverts commit 75397ca that initially went in to prevent an error from being emitted to customers.

* Update openmp_sample.f90

* Update openmp_sample.f90 (#2371)

* Update requirements.txt

* Update inc_sample_tensorflow.ipynb

* Update inc_quantize_model.py

* Update README.md

* Update release.json

* Fix ONSAM-1905 (#2376)

* FPGA: re-enable the fft2d sample (#2381)

This sample is previously disabled in #2355.
Re-enabling for better test coverage of the sample.

* FPGA: Bug fixes for the fft2d sample (#2382)

1. Fix array index out of bound in function `ReorderData`
2. Fix use of uninitialized array `fft_delay_elements`

* Add explicit header (#2367)

* “inlinePTX_with_codepin” (#2372)

Signed-off-by: AvijitBag07 <AvijitBag07@intel.com>
Co-authored-by: AvijitBag07 <AvijitBag07@intel.com>

* Adding 2 new openACC-openMP migrated samples (#2373)

* New openmp samples

* Updated New samples

* Adding pSTL-offload sample (#2374)

* pSTL offload sample

* pSTL offload sample

* minor fixes to multi-gpu training (#2377)

* Fix crashes in f_use_device_addr_01, dgemm_pad_f_01, dgemm_dispatch_f (#2378)

* Fix crashes in f_use_device_addr_01, dgemm_pad_f_01, and dgemm_dispatch_f (ONSAM-1918).

* Fix crashes in f_use_device_addr_01, dgemm_pad_f_01, dgemm_dispatch_f

* Fix crashes in f_use_device_addr_01, dgemm_pad_f_01, dgemm_dispatch_f

* Add explicit headers (#2366)

* FPGA: correct 'categories' for hls flow/interfaces code samples (#2383)

Correct 'categories' for hls flow/interfaces code samples so they group together nicely in the sample browser

* FPGA: Remove unused memory allocation in the gzip sample (#2386)

The gzip code sample included a memory allocation of the size of the file to be compressed, which was issued for every repeated iteration of the kernel.
This led to increasingly large host memory allocation when the file to compress was increasing in size.
However, the allocated memory was never used.
This change therefore removes the unneeded allocation.

* FPGA: Update gzip throughput experiment date

* FPGA: Correct performance testing date in PCA

* FPGA: Correct performance testing date in matmul

* FPGA: Correct performance testing date in CRR

* FPGA: Correct performance testing date in QRD

* FPGA: Correct performance testing date in Cholesky inversion

* FPGA: Correct performance testing date in Cholesky

* FPGA: Add missing cmath include in the hardware_reuse sample (#2387)

* Update sample.json and remove unused code

* forgot this requirements.txt earlier

* Update README.md

* Update README.md

* Update sample.json

* Update sample.json

---------

Signed-off-by: AvijitBag07 <AvijitBag07@intel.com>
Co-authored-by: Jimmy Wei <jimmy.t.wei@intel.com>
Co-authored-by: Justin Rosner <justin.rosner@intel.com>
Co-authored-by: Zhiqiang Ma <zhiqiang.ma@intel.com>
Co-authored-by: intel-jisheng1 <shengxiang.ji@intel.com>
Co-authored-by: IgorOchocki <36711066+IgorOchocki@users.noreply.github.com>
Co-authored-by: AvijitBag07 <144990856+AvijitBag07@users.noreply.github.com>
Co-authored-by: AvijitBag07 <AvijitBag07@intel.com>
Co-authored-by: vidyalathabadde <134362858+vidyalathabadde@users.noreply.github.com>
Co-authored-by: Shwetha-Selma <134358522+Shwetha-Selma@users.noreply.github.com>
Co-authored-by: Rakshith <rakshith.krishnappa@intel.com>
Co-authored-by: nawalcopty <nawal.copty@intel.com>
Co-authored-by: Paul White <paul.white@intel.com>
Co-authored-by: yuguen-intel <yohann.uguen@intel.com>
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3 participants