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o1vm/riscv32: implement M type instruction divu #2807

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merged 1 commit into from
Dec 3, 2024

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@dannywillems dannywillems requested a review from svv232 November 20, 2024 16:06
@@ -2193,7 +2193,17 @@ pub fn interpret_mtype<Env: InterpreterEnv>(env: &mut Env, instr: MInstruction)
env.set_next_instruction_pointer(next_instruction_pointer + Env::constant(4u32));
}
MInstruction::Divu => {
unimplemented!("Divu")
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it would be nice to comment the implementation from https://msyksphinz-self.github.io/riscv-isadoc/html/rvm.html

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we can follow up with this documentation in a future pr

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codecov bot commented Nov 21, 2024

Codecov Report

Attention: Patch coverage is 0% with 11 lines in your changes missing coverage. Please review.

Project coverage is 71.92%. Comparing base (2e4d754) to head (e084008).
Report is 117 commits behind head on master.

Files with missing lines Patch % Lines
o1vm/src/interpreters/riscv32im/interpreter.rs 0.00% 11 Missing ⚠️
Additional details and impacted files
@@            Coverage Diff             @@
##           master    #2807      +/-   ##
==========================================
- Coverage   71.93%   71.92%   -0.01%     
==========================================
  Files         257      257              
  Lines       60271    60275       +4     
==========================================
- Hits        43357    43355       -2     
- Misses      16914    16920       +6     

☔ View full report in Codecov by Sentry.
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@dannywillems dannywillems force-pushed the dw/riscv32/remove-divmod branch from d7e039d to 7482d1b Compare December 2, 2024 18:58
Base automatically changed from dw/riscv32/remove-divmod to master December 3, 2024 14:21
@dannywillems dannywillems force-pushed the dw/riscv32-impl-m-type-divu branch from b44fedc to e084008 Compare December 3, 2024 14:23
@dannywillems dannywillems merged commit 8da1a41 into master Dec 3, 2024
7 of 8 checks passed
@dannywillems dannywillems deleted the dw/riscv32-impl-m-type-divu branch December 3, 2024 15:32
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2 participants