Aggregate assignment causes 'Fatal: pointer and stored value do not have same type'

[McSherry]

I have some VHDL that looks a bit like this:

architecture rtl of some_ip is
  type reg_e is (
    -- ...
    I2CCFG,
    -- ...
  );

  type   read_port_t is array(reg_e range reg_e'left to reg_e'right) of std_ulogic_vector(apb_prdata_o'range);
  signal read_port   : read_port_t;
begin
    
  -- ... some other logic ...

  i2ccfg_b: block is
    subtype Clkdiv is natural range 3 downto 0;
    signal clkdiv_q : unsigned(3 downto 0);
  begin
    -- ... logic that assigns 'clkdiv_q' ...
    
    some_alias: read_port(I2CCFG) <= (
      Clkdiv => std_ulogic_vector(clkdiv_q),
      others => '-'
    );
  end block i2ccfg_b;
  
  -- ... some other logic ...
end rtl;

Running this with NVC v1.11.3, this seemed to work fine. I upgraded to NVC v1.14.1, and it produces the following error:

COCOTB_TESTCASE= COCOTB_TEST_FILTER= COCOTB_TEST_MODULES=design.video.phy.tb.video_phy COCOTB_TOPLEVEL=video_phy TOPLEVEL_LANG=vhdl \
   /usr/local/bin/nvc --std=2008 --work=work:sim_build/work -L sim_build \
  -e video_phy --no-save --cover \
  -r --load /$(PYPACKAGES)/cocotb/libs/libcocotbvhpi_nvc.so  --wave --format=vcd  

Name       WORK.VIDEO_PHY.U_APB.I2CCFG_B.SOME_ALIAS
Kind       process
Context    WORK.VIDEO_PHY.U_APB.I2CCFG_B
Blocks     4
Registers  38
Types      21
Variables  2
  tmp3                                  // [16] : 0..8 => 0..8, temp
  i4                                    // -2^31..2^31-1 => 0..2^31-1, temp
Begin
   0: r0 := var upref 2, READ_PORT      // @<$<0..8>> => 0..8
      r1 := load indirect r0            // $<0..8> => 0..8
      r2 := const 0                     // # => 0
      r3 := const 0                     // 0..6 => 0
      r4 := const 1                     // # => 1
      r5 := const 16                    // # => 16
      r6 := array ref r1 offset r2      // $<0..8> => 0..8
      drive signal r6 count r5
      r7 := var upref 1, CLKDIV_Q       // @<$<0..8>> => 0..8
      r8 := load indirect r7            // $<0..8> => 0..8
      r9 := const 4                     // # => 4
      sched event on r8 count r9
      return 
   1: cover stmt 921 
      r10 := var upref 2, READ_PORT     // @<$<0..8>> => 0..8
      r11 := load indirect r10          // $<0..8> => 0..8
      r12 := const 0                    // # => 0
      r13 := const 0                    // 0..6 => 0
      r14 := const 1                    // # => 1
      r15 := const 16                   // # => 16
      r16 := array ref r11 offset r12   // $<0..8> => 0..8
      r17 := const 0                    // -2^63..2^63-1 => 0
      r18 := index tmp3                 // @<0..8> => 0..8
      r19 := var upref 1, CLKDIV_Q      // @<$<0..8>> => 0..8
      r20 := load indirect r19          // $<0..8> => 0..8
      r21 := resolved r20               // @<0..8> => 0..8
      r22 := const 3                    // -2^31..2^31-1 => 3
      r23 := const 0                    // -2^31..2^31-1 => 0
      r24 := const 1                    // 0..1 => 1
      r25 := wrap r21 [r22 r23 r24]     // [*] : 0..8
      r26 := const 2147483647           // -2^31..2^31-1 => 2^31-1
      r27 := const 0                    // 0..1 => 0
      r28 := debug locus STD.STANDARD+3425 // D<>
      r29 := debug locus WORK.ROIF_APB_ADAPTER-RTL+2178 // D<>
      r30 := const 8                    // 0..8 => 8
      r31 := const 15                   // -2^31..2^31-1 => 15
      r18 := memset r30 length r15
      r32 := debug locus WORK.ROIF_APB_ADAPTER-RTL+1954 // D<>
      i4 := store r22
      jump 2
   2: r33 := load i4                    // -2^31..2^31-1 => 0..2^31-1
      r34 := const 15                   // -2^31..2^31-1 => 15
      r35 := sub r34 - r33              // -2^31..2^31-1 => -2147483632..15
      r36 := cast r35                   // # => -2147483632..15
      r37 := array ref r18 offset r36   // @<0..8> => 0..8
      r37 := store indirect r25	 <----
   3: Empty basic block

This error goes away if I revise the assignment to read_port to the following:

process(all) is
begin
    read_port(I2CCFG)         <= (others => '-');
    read_port(I2CCFG)(Clkdiv) <= std_ulogic_vector(clkdiv_q);
end process;

[nickg]

Should be fixed now on the master branch. I'll do a 1.14.2 release with this in at the weekend.