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added support for Hexagon v75, v77, v79
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alexei committed May 21, 2024
1 parent 90096e7 commit 3c47c56
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4 changes: 3 additions & 1 deletion README.md
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ Hexagon Processor Module
========================
This is [Hexagon](https://developer.qualcomm.com/software/hexagon-dsp-sdk/dsp-processor) (aka QDSP6) processor module for [IDA Pro](https://www.hex-rays.com/products/ida/) disassembler.
Features:
* Supports all Hexagon versions: V4, V5, V55, V60, V61, V62, V65, V66, V67, V67t, V68, V69, V71, V73
* Supports all Hexagon versions: V4, V5, V55, V60, V61, V62, V65, V66, V67, V67t, V68, V69, V71, V73, V75, V77, V79
* Supports Hexagon Vector Extensions (HVX), audio extensions
* Supports Hexagon Matrix Extensions (HMX), V66 NN extensions
* Supports all known instructions, including undocumented ones
Expand Down Expand Up @@ -45,6 +45,7 @@ Issues
* Does not distinguish between different Hexagon versions; will disassemble instructions not supported by a particular version.
* IDA stores flags for two operands only, and all subsequent operands will have the same flag. For example, if the 2nd operand is an offset, then 4th will be treated as offset too.
* Xref to a stack variable has random type (r/w).
* Some experimental instructions are not decoded.


Other Hexagon Processor modules
Expand Down Expand Up @@ -85,3 +86,4 @@ History
2022-02-14 predicate operands stored at the end of ops array; version 5.0 released
2023-03-31 added support for IDA v7.7
2023-06-26 added support for Hexagon v73; version 5.2 released
2024-05-21 added support for Hexagon v75, v77, v79; version 5.3 released
361 changes: 253 additions & 108 deletions hexagon/ana.cpp

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3 changes: 3 additions & 0 deletions hexagon/elfr_hexagon.h
Original file line number Diff line number Diff line change
Expand Up @@ -124,6 +124,9 @@ enum
EF_HEXAGON_MACH_V69 = 0x69, // Hexagon V69
EF_HEXAGON_MACH_V71 = 0x71, // Hexagon V71
EF_HEXAGON_MACH_V73 = 0x73, // Hexagon V73
EF_HEXAGON_MACH_V75 = 0x75, // Hexagon V75
EF_HEXAGON_MACH_V77 = 0x77, // Hexagon V77
EF_HEXAGON_MACH_V79 = 0x79, // Hexagon V79

// processor specific dynamic array tags
DT_HEXAGON_SYMSZ = 0x70000000,
Expand Down
33 changes: 18 additions & 15 deletions hexagon/ins.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -131,9 +131,9 @@ static const char *const insn_template[] = {
"brkpt", // Hex_brkpt
"dccleana(%0)", // Hex_dccleana
"dccleaninva(%0)", // Hex_dccleaninva
"dcfetch(%0)", // Hex_dcfetchbo
"dcfetch(%0)%t", // Hex_dcfetch
"dcinva(%0)", // Hex_dcinva
"dczeroa(%0)", // Hex_dczeroa
"dczeroa(%0)%t", // Hex_dczeroa
"diag(%0)", // Hex_diag
"diag0(%0, %1)", // Hex_diag0
"diag1(%0, %1)", // Hex_diag1
Expand Down Expand Up @@ -371,6 +371,7 @@ static const char *const insn_template[] = {
"release(%0)", // Hex_release,
// HVX
"%0=prefixsum(%1)", // Hex_prefixsum
"%0=v6mpy(%1, %2, %3)", // Hex_v6mpy
"%0=vabs(%1)", // Hex_vabs
"%0=vabsdiff(%1, %2)", // Hex_vabsdiff
"%0=vadd(%1, %2)", // Hex_vadd
Expand All @@ -387,6 +388,10 @@ static const char *const insn_template[] = {
"%0=vcombine(%1, %2)", // Hex_vcombine
"%0=vcl0(%1)", // Hex_vcl0
"%0=vcmp%c(%1, %2)", // Hex_vcmp
"%0=vcvt(%1)", // Hex_vcvt
"%0=vcvt(%1, %2)", // Hex_vcvt_2
"%0=vcvt2(%1)", // Hex_vcvt2
"%0=vcvt2(%1, %2)", // Hex_vcvt2_2
"%0=vdeal(%1)", // Hex_vdeal
"vdeal(%0, %1, %2)", // Hex_vdeal3
"%0=vdeal(%1, %2, %3)", // Hex_vdeal4
Expand All @@ -396,7 +401,12 @@ static const char *const insn_template[] = {
"%0=vdmpy(%1, %2, %3)", // Hex_vdmpy3
"%0=vdsad(%1, %2)", // Hex_vdsad
"%0=vextract(%1, %2)", // Hex_vextract
"%0=vfmax(%1, %2)", // Hex_vfmax
"%0=vfmin(%1, %2)", // Hex_vfmin
"%0=vfmv(%1)", // Hex_vfmv
"%0=vfneg(%1)", // Hex_vfneg
"%0=vgather(%1, %2, %3)%g", // Hex_vgather
"%0=vgetqfext(%1, %2)", // Hex_vgetqfext
"vhist", // Hex_vhist
"vhist(%0)", // Hex_vhist1
"%0=vinsert(%1)", // Hex_vinsert
Expand All @@ -406,6 +416,7 @@ static const char *const insn_template[] = {
"%0=vlut32(%1, %2, %3)", // Hex_vlut32
"%0=vlut4(%1, %2)", // Hex_vlut4
"%0=vmax(%1, %2)", // Hex_vmax
"%0=vmerge(%1, %2)", // Hex_vmerge
"%0=vmin(%1, %2)", // Hex_vmin
"%0=vmpa(%1, %2)", // Hex_vmpa
"%0=vmpa(%0, %1, %2)", // Hex_vmpa3
Expand All @@ -426,9 +437,13 @@ static const char *const insn_template[] = {
"%0=vpacke(%1, %2)", // Hex_vpacke
"%0=vpacko(%1, %2)", // Hex_vpacko
"%0=vpopcount(%1)", // Hex_vpopcount
"%0=vr16mpyz(%1, %2)", // Hex_vr16mpyz
"%0=vr16mpyzs(%1, %2)", // Hex_vr16mpyzs
"%0=vr8mpyz(%1, %2)", // Hex_vr8mpyz
"%0=vrdelta(%1, %2)", // Hex_vrdelta
"%0=vrmpy(%1, %2)", // Hex_vrmpy
"%0=vrmpy(%1, %2, %3)", // Hex_vrmpy3
"%0=vrmpyz(%1, %2)", // Hex_vrmpyz
"%0=vror(%1, %2)", // Hex_vror
"%0=vrotr(%1, %2)", // Hex_vrotr
"%0=vround(%1, %2)", // Hex_vround
Expand All @@ -439,6 +454,7 @@ static const char *const insn_template[] = {
"%0:scatter_release", // Hex_vscatterrls
"%0=vsetq(%1)", // Hex_vsetq
"%0=vsetq2(%1)", // Hex_vsetq2
"%0=vsetqfext(%1, %2)", // Hex_vsetqfext
"%0=vshuff(%1)", // Hex_vshuff
"vshuff(%0, %1, %2)", // Hex_vshuff3
"%0=vshuff(%1, %2, %3)", // Hex_vshuff4
Expand All @@ -461,20 +477,7 @@ static const char *const insn_template[] = {
"vwhist256(%0)", // Hex_vwhist256_1
"%0=vxor(%1, %2)", // Hex_vxor
"%0=vzxt(%1)", // Hex_vzxt
// HVX v66 AI extension
"%0=vr16mpyz(%1, %2)", // Hex_vr16mpyz
"%0=vr16mpyzs(%1, %2)", // Hex_vr16mpyzs
"%0=vr8mpyz(%1, %2)", // Hex_vr8mpyz
"%0=vrmpyz(%1, %2)", // Hex_vrmpyz
"%0=zextract(%1)", // Hex_zextract
// HVX v68
"%0=v6mpy(%1, %2, %3)", // Hex_v6mpy
"%0=vcvt(%1)", // Hex_vcvt
"%0=vcvt(%1, %2)", // Hex_vcvt2
"%0=vfmax(%1, %2)", // Hex_vfmax
"%0=vfmin(%1, %2)", // Hex_vfmin
"%0=vfmv(%1)", // Hex_vfmv
"%0=vfneg(%1)", // Hex_vfneg
// HMX
"mxclr%0", // Hex_mxclr
"%0=mxshl(%0, %1)", // Hex_mxshl
Expand Down
49 changes: 27 additions & 22 deletions hexagon/ins.h
Original file line number Diff line number Diff line change
Expand Up @@ -97,14 +97,16 @@ enum {
REG_POST_SF = (13 << 4), // .sf
REG_POST_HF = (14 << 4), // .hf
REG_POST_BF = (15 << 4), // .bf
REG_POST_Q32 = (16 << 4), // .qf32
REG_POST_Q16 = (17 << 4), // .qf16
REG_POST_N = (18 << 4), // .n (nibble)
REG_POST_C = (19 << 4), // .c (crumb)
REG_POST_SC = (20 << 4), // .sc
REG_POST_SM = (21 << 4), // .sm
REG_POST_UBIT = (22 << 4), // .ubit
REG_POST_SBIT = (23 << 4), // .sbit
REG_POST_F8 = (16 << 4), // .f8
REG_POST_X = (17 << 4), // .x
REG_POST_Q32 = (18 << 4), // .qf32
REG_POST_Q16 = (19 << 4), // .qf16
REG_POST_N = (20 << 4), // .n (nibble)
REG_POST_C = (21 << 4), // .c (crumb)
REG_POST_SC = (22 << 4), // .sc
REG_POST_SM = (23 << 4), // .sm
REG_POST_UBIT = (24 << 4), // .ubit
REG_POST_SBIT = (25 << 4), // .sbit
REG_POST_MASK = (31 << 4),
REG_POST_SHIFT = 4,
REG_POST_INC = (1 << 9), // ...++
Expand Down Expand Up @@ -704,6 +706,7 @@ enum {
// HVX
Hex_HVX_FIRST,
Hex_prefixsum = Hex_HVX_FIRST, // %0 = prefixsum(%1)
Hex_v6mpy, // %0 = v6mpy(%1,%2,%3)
Hex_vabs, // %0 = vabs(%1)
Hex_vabsdiff, // %0 = vabsdiff(%1,%2)
Hex_vadd, // %0 = vadd(%1,%2)
Expand All @@ -720,6 +723,10 @@ enum {
Hex_vcombine, // %0 = vcombine(%1,%2)
Hex_vcl0, // %0 = vcl0(%1)
Hex_vcmp, // %0 = vcmp%c(%1,%2)
Hex_vcvt, // %0 = vcvt(%1)
Hex_vcvt_2, // %0 = vcvt(%1,%2)
Hex_vcvt2, // %0 = vcvt2(%1)
Hex_vcvt2_2, // %0 = vcvt2(%1, %2)
Hex_vdeal, // %0 = vdeal(%1)
Hex_vdeal3, // vdeal(%0,%1,%2)
Hex_vdeal4, // %0 = vdeal(%1,%2,%3)
Expand All @@ -729,7 +736,12 @@ enum {
Hex_vdmpy3, // %0 = vdmpy(%1,%2,%3)
Hex_vdsad, // %0 = vdsad(%1,%2)
Hex_vextract, // %0 = vextract(%1,%2)
Hex_vfmax, // %0 = vfmax(%1,%2)
Hex_vfmin, // %0 = vfmin(%1,%2)
Hex_vfmv, // %0 = vfmv(%1)
Hex_vfneg, // %0 = vfneg(%1)
Hex_vgather, // %0 = vgather(%1,%2,%3)%g
Hex_vgetqfext, // %0 = vgetqfext(%1,%2)
Hex_vhist, // vhist
Hex_vhist1, // vhist(%0)
Hex_vinsert, // %0 = vinsert(%1)
Expand All @@ -739,6 +751,7 @@ enum {
Hex_vlut32, // %0 = vlut32(%1,%2,%3)
Hex_vlut4, // %0 = vlut4(%1,%2)
Hex_vmax, // %0 = vmax(%1,%2)
Hex_vmerge, // %0 = vmerge(%1,%2)
Hex_vmin, // %0 = vmin(%1,%2)
Hex_vmpa, // %0 = vmpa(%1,%2)
Hex_vmpa3, // %0 = vmpa(%0,%1,%2)
Expand All @@ -759,9 +772,13 @@ enum {
Hex_vpacke, // %0 = vpacke(%1,%2)
Hex_vpacko, // %0 = vpacko(%1,%2)
Hex_vpopcount, // %0 = vpopcount(%1)
Hex_vr16mpyz, // %0 = vr16mpyz(%1,%2)
Hex_vr16mpyzs, // %0 = vr16mpyzs(%1,%2)
Hex_vr8mpyz, // %0 = vr8mpyz(%1,%2)
Hex_vrdelta, // %0 = vrdelta(%1,%2)
Hex_vrmpy, // %0 = vrmpy(%1,%2)
Hex_vrmpy3, // %0 = vrmpy(%1,%2,%3)
Hex_vrmpyz, // %0 = vrmpyz(%1,%2)
Hex_vror, // %0 = vror(%1,%2)
Hex_vrotr, // %0 = vrotr(%1,%2)
Hex_vround, // %0 = vround(%1,%2)
Expand All @@ -772,6 +789,7 @@ enum {
Hex_vscatterrls, // %0:scatter_release
Hex_vsetq, // %0 = vsetq(%1)
Hex_vsetq2, // %0 = vsetq2(%1)
Hex_vsetqfext, // %0 = vsetqfext(%1,%2)
Hex_vshuff, // %0 = vshuff(%1)
Hex_vshuff3, // vshuff(%0,%1,%2)
Hex_vshuff4, // %0 = vshuff(%1,%2,%3)
Expand All @@ -794,21 +812,8 @@ enum {
Hex_vwhist256_1, // vwhist256(%0)
Hex_vxor, // %0 = vxor(%1,%2)
Hex_vzxt, // %0 = vzxt(%1)
// HVX v66 AI extension
Hex_vr16mpyz, // %0 = vr16mpyz(%1,%2)
Hex_vr16mpyzs, // %0 = vr16mpyzs(%1,%2)
Hex_vr8mpyz, // %0 = vr8mpyz(%1,%2)
Hex_vrmpyz, // %0 = vrmpyz(%1,%2)
Hex_zextract, // %0 = zextract(%1)
// HVX v68
Hex_v6mpy, // %0 = v6mpy(%1,%2,%3)
Hex_vcvt, // %0 = vcvt(%1)
Hex_vcvt2, // %0 = vcvt(%1,%2)
Hex_vfmax, // %0 = vfmax(%1,%2)
Hex_vfmin, // %0 = vfmin(%1,%2)
Hex_vfmv, // %0 = vfmv(%1)
Hex_vfneg, // %0 = vfneg(%1)
Hex_HVX_LAST = Hex_vfneg,
Hex_HVX_LAST = Hex_zextract,
// HMX
Hex_mxclr, // mxclr%0
Hex_mxshl, // %0 = mxshl(%0,%1)
Expand Down
3 changes: 3 additions & 0 deletions hexagon/loader.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,9 @@ static const char* proc_describe_flag_bit( proc_def_t* /*self*/, uint32 *e_flags
case EF_HEXAGON_MACH_V69: opts = "Hexagon V69"; break;
case EF_HEXAGON_MACH_V71: opts = "Hexagon V71"; break;
case EF_HEXAGON_MACH_V73: opts = "Hexagon V73"; break;
case EF_HEXAGON_MACH_V75: opts = "Hexagon V75"; break;
case EF_HEXAGON_MACH_V77: opts = "Hexagon V77"; break;
case EF_HEXAGON_MACH_V79: opts = "Hexagon V79"; break;
}
// clear used flags to prevent infinite loop
if( opts ) *e_flags = 0;
Expand Down
2 changes: 1 addition & 1 deletion hexagon/out.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -200,7 +200,7 @@ static void hex_out_reg( outctx_t &ctx, uint32_t reg, uint32_t flags = 0 )
static const char *postfix[] = {
"", ".new", ".cur", ".tmp", ".l", ".h", "*",
".b", ".h", ".w", ".ub", ".uh", ".uw",
".sf", ".hf", ".bf", ".qf32", ".qf16",
".sf", ".hf", ".bf", ".f8", ".x", ".qf32", ".qf16",
".n", ".c", ".sc", ".sm", ".ubit", ".sbit",
};
ctx.out_keyword( postfix[(flags & REG_POST_MASK) >> REG_POST_SHIFT] );
Expand Down

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