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Add architecture specific implementation details for KFENCE and enable KFENCE for the ppc32 architecture. In particular, this implements the required interface in <asm/kfence.h>. KFENCE requires that attributes for pages from its memory pool can individually be set. Therefore, force the Read/Write linear map to be mapped at page granularity. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Acked-by: Marco Elver <elver@google.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/8dfe1bd2abde26337c1d8c1ad0acfcc82185e0d5.1614868445.git.christophe.leroy@csgroup.eu
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/* SPDX-License-Identifier: GPL-2.0 */ | ||
/* | ||
* powerpc KFENCE support. | ||
* | ||
* Copyright (C) 2020 CS GROUP France | ||
*/ | ||
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#ifndef __ASM_POWERPC_KFENCE_H | ||
#define __ASM_POWERPC_KFENCE_H | ||
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#include <linux/mm.h> | ||
#include <asm/pgtable.h> | ||
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static inline bool arch_kfence_init_pool(void) | ||
{ | ||
return true; | ||
} | ||
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static inline bool kfence_protect_page(unsigned long addr, bool protect) | ||
{ | ||
pte_t *kpte = virt_to_kpte(addr); | ||
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if (protect) { | ||
pte_update(&init_mm, addr, kpte, _PAGE_PRESENT, 0, 0); | ||
flush_tlb_kernel_range(addr, addr + PAGE_SIZE); | ||
} else { | ||
pte_update(&init_mm, addr, kpte, 0, _PAGE_PRESENT, 0); | ||
} | ||
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return true; | ||
} | ||
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#endif /* __ASM_POWERPC_KFENCE_H */ |
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