Copied fix from this issue: espressif#17

max1220 · Oct 5, 2022 · 5f3e841 · 5f3e841
1 parent 0152246
commit 5f3e841
Show file tree

Hide file tree

Showing 2 changed files with 7 additions and 1 deletion.
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
@@ -203,6 +203,7 @@ static const FlashPartInfo known_devices[] = {
     /* GigaDevice */
     { INFO("gd25q32",     0xc84016,      0,  64 << 10,  64, ER_4K) },
     { INFO("gd25q64",     0xc84017,      0,  64 << 10, 128, ER_4K) },
+    { INFO("gd25q128",    0xc84018,      0,  64 << 10, 256, ER_4K) },
 
     /* Intel/Numonyx -- xxxs33b */
     { INFO("160s33b",     0x898911,      0,  64 << 10,  32, 0) },

diff --git a/hw/xtensa/esp32.c b/hw/xtensa/esp32.c
@@ -39,12 +39,17 @@
 #include "elf.h"
 
 #define TYPE_ESP32_SOC "xtensa.esp32"
+
+// HACK: For now, just use the larger flash chip by default
+#define ESP32_FLASH_CHIP "gd25q128"
+
 #define ESP32_SOC(obj) OBJECT_CHECK(Esp32SocState, (obj), TYPE_ESP32_SOC)
 
 #define TYPE_ESP32_CPU XTENSA_CPU_TYPE_NAME("esp32")
 
 
 
+
 enum {
     ESP32_MEMREGION_IROM,
     ESP32_MEMREGION_DROM,
@@ -665,7 +670,7 @@ static void esp32_machine_init_spi_flash(Esp32SocState *ss, BlockBackend* blk)
     /* "main" flash chip is attached to SPI1, CS0 */
     DeviceState *spi_master = DEVICE(&ss->spi[1]);
     BusState* spi_bus = qdev_get_child_bus(spi_master, "spi");
-    DeviceState *flash_dev = qdev_new("gd25q32");
+    DeviceState *flash_dev = qdev_new(ESP32_FLASH_CHIP);
     qdev_prop_set_drive(flash_dev, "drive", blk);
     qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal);
     qdev_connect_gpio_out_named(spi_master, SSI_GPIO_CS, 0,