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arch/risc-v/eic7700x: Add support for ESWIN EIC7700X SoC #95

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@lupyuen lupyuen commented Mar 2, 2025

Summary

This PR adds support for the ESWIN EIC7700X RISC-V SoC. This will be used by the upcoming port of NuttX for PINE64 StarPro64 SBC.

Most of the code was derived from NuttX for SOPHGO SG2000 SoC. The modified code is explained here

Modified Files in arch/risc-v

Kconfig: Added ARCH_CHIP_EIC7700X for EIC7700X SoC

New Files in arch/risc-v

include/eic7700x/chip.h: EIC7700X Definitions

include/eic7700x/irq.h: External Interrupts

src/eic7700x/chip.h: Interrupt Stack Macro

src/eic7700x/eic7700x_allocateheap.c: Kernel Heap

src/eic7700x/eic7700x_head.S: Linux Header and Boot Code

src/eic7700x/eic7700x_irq.c: Configure Interrupts

src/eic7700x/eic7700x_irq_dispatch.c: Dispatch Interrupts

src/eic7700x/eic7700x_memorymap.h: Memory Map

src/eic7700x/eic7700x_mm_init.c, eic7700x_mm_init.h: Memory Mgmt

src/eic7700x/eic7700x_pgalloc.c: Page Allocator

src/eic7700x/eic7700x_start.c: Startup Code

src/eic7700x/eic7700x_timerisr.c: Timer Interrupt

src/eic7700x/hardware/eic7700x_memorymap.h: PLIC and UART Base Address

src/eic7700x/hardware/eic7700x_plic.h: PLIC Register Addresses

src/eic7700x/Kconfig: EIC7700X Config

src/eic7700x/Make.defs: Makefile

Documentation

platforms/risc-v/eic7700x/index.rst: Added EIC7700X SoC

Impact

This PR is needed for the upcoming port of NuttX for PINE64 StarPro64 SBC.

No impact on existing code, since the EIC7700X source files are not used by existing code.

Testing

We tested the EIC7700X source files on PINE64 StarPro64 SBC. NuttX boots correctly to NSH Shell and passes OSTest:

NuttShell (NSH) NuttX-12.4.0
nsh> uname -a
NuttX 12.4.0 14a291013c Mar  2 2025 08:34:00 risc-v starpro64

nsh> free
      total       used       free    maxused    maxfree  nused  nfree name
    2057216      11632    2045584      33320    2042800     38      6 Kmem
   20971520     720896   20250624              20250624               Page

nsh> ls -l /dev
/dev:
 crw-rw-rw-           0 console
 crw-rw-rw-           0 null
 brw-rw-rw-    16777216 ram0
 crw-rw-rw-           0 ttyS0
 crw-rw-rw-           0 zero

nsh> ps
  PID GROUP PRI POLICY   TYPE    NPX STATE    EVENT     SIGMASK            STACK    USED FILLED COMMAND
    0     0   0 FIFO     Kthread   - Ready              0000000000000000 0003056 0000808  26.4%  Idle_Task
    1     0 100 RR       Kthread   - Waiting  Semaphore 0000000000000000 0001968 0000720  36.5%  lpwork 0x80400100 0x80400148
    3     3 100 RR       Task      - Running            0000000000000000 0003008 0001872  62.2%  /system/bin/init

nsh> hello
Hello, World!!

nsh> getprime
Set thread priority to 10
Set thread policy to SCHED_RR
Start thread #0
thread #0 started, looking for primes < 10000, doing 10 run(s)
thread #0 finished, found 1230 primes, last one was 9973
Done
getprime took 134 msec

nsh> ostest
...
Final memory usage:
VARIABLE  BEFORE   AFTER
======== ======== ========
arena       81000    81000
ordblks         2        3
mxordblk    7cff8    78ff8
uordblks     2660     4570
fordblks    7e9a0    7ca90
user_main: Exiting
ostest_main: Exiting with status 0
nsh>

This PR adds support for the ESWIN EIC7700X RISC-V SoC.
This will be used by the upcoming port of NuttX for PINE64 StarPro64 SBC.

Most of the code was derived from NuttX for SOPHGO SG2000 SoC.
The modified code is explained here:
https://lupyuen.github.io/articles/starpro64#appendix-port-nuttx-to-starpro64

Modified Files in arch/risc-v:

Kconfig: Added ARCH_CHIP_EIC7700X for EIC7700X SoC

New Files in arch/risc-v:

include/eic7700x/chip.h: EIC7700X Definitions
include/eic7700x/irq.h: External Interrupts
src/eic7700x/chip.h: Interrupt Stack Macro
src/eic7700x/eic7700x_allocateheap.c: Kernel Heap
src/eic7700x/eic7700x_head.S: Linux Header and Boot Code
src/eic7700x/eic7700x_irq.c: Configure Interrupts
src/eic7700x/eic7700x_irq_dispatch.c: Dispatch Interrupts
src/eic7700x/eic7700x_memorymap.h: Memory Map
src/eic7700x/eic7700x_mm_init.c, eic7700x_mm_init.h: Memory Mgmt
src/eic7700x/eic7700x_pgalloc.c: Page Allocator
src/eic7700x/eic7700x_start.c: Startup Code
src/eic7700x/eic7700x_timerisr.c: Timer Interrupt
src/eic7700x/hardware/eic7700x_memorymap.h: PLIC and UART Base Address
src/eic7700x/hardware/eic7700x_plic.h: PLIC Register Addresses
src/eic7700x/Kconfig: EIC7700X Config
src/eic7700x/Make.defs: Makefile

Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
@lupyuen lupyuen force-pushed the starpro64-arch branch 2 times, most recently from f8250c6 to 5cc0a01 Compare March 2, 2025 01:21
…0X SoC

This PR adds support for the ESWIN EIC7700X RISC-V SoC.
This will be used by the upcoming port of NuttX for PINE64 StarPro64 SBC.

Most of the code was derived from NuttX for SOPHGO SG2000 SoC.
The modified code is explained here:
https://lupyuen.github.io/articles/starpro64#appendix-port-nuttx-to-starpro64

platforms/risc-v/eic7700x/index.rst: Added EIC7700X SoC

Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
@lupyuen lupyuen changed the title arch/risc-v/eic7700x: Add support for ESWIN EIC7700X SoC boards/risc-v: Add support for Milk-V Duo S SBC (SOPHGO SG2000 SoC) Mar 2, 2025
@lupyuen lupyuen changed the title boards/risc-v: Add support for Milk-V Duo S SBC (SOPHGO SG2000 SoC) boards/risc-v/eic7700x/starpro64: Add support for PINE64 StarPro64 SBC (ESWIN EIC7700X SoC) Mar 2, 2025
@lupyuen lupyuen changed the title boards/risc-v/eic7700x/starpro64: Add support for PINE64 StarPro64 SBC (ESWIN EIC7700X SoC) arch/risc-v/eic7700x: Add support for ESWIN EIC7700X SoC Mar 2, 2025
@lupyuen lupyuen closed this Mar 2, 2025
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