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1. Logicademy/PYNQ-SoC-Builder Logicademy/PYNQ-SoC-Builder Public

   This project automates process of creating a PYNQ Z1/Z2 Overlay in Vivado, generates a custom Juypter Notebook template and uploads to a target PYNQ FPGA.

   Python 3 3

2. Logicademy/HDLGen-ChatGPT Logicademy/HDLGen-ChatGPT Public

   HDLGen-ChatGPT, works in tandem with ChatGPT chat interface to enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and testb…

   Python 23 14

3. DemoDesigns DemoDesigns Public

   HDLGen-ChatGPT and PYNQ SoC Builder Demo Designs

   VHDL 1