[mlir][vector] Remove Emulated Sub-directory #94742
Merged
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
mub-at-arm
requested review from
banach-space,
dcaballe and
nicolasvasilache
as code owners
|
@llvm/pr-subscribers-mlir-sme @llvm/pr-subscribers-mlir Author: Mubashar Ahmad (mub-at-arm) ChangesThe "Emulated" sub-directory under "ArmSVE" has Full diff: https://github.com/llvm/llvm-project/pull/94742.diff 5 Files Affected:
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/lit.local.cfg b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/lit.local.cfg
deleted file mode 100644
index 0d8ad605f598f..0000000000000
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/lit.local.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# The tests in this folder assume full control of the hardware features, such as
-# the vector length, so must be run under an emulator.
-
-if not config.arm_emulator_executable:
- config.unsupported = True
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-scalable-deinterleave.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-scalable-deinterleave.mlir
deleted file mode 100644
index e6c561437132f..0000000000000
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-scalable-deinterleave.mlir
+++ /dev/null
@@ -1,30 +0,0 @@
-// DEFINE: %{entry_point} = entry
-// DEFINE: %{compile} = mlir-opt %s -test-lower-to-llvm
-// DEFINE: %{run} = %mcr_aarch64_cmd -march=aarch64 -mattr=+sve \
-// DEFINE: -e %{entry_point} -entry-point-result=void \
-// DEFINE: -shared-libs=%mlir_c_runner_utils,%mlir_arm_runner_utils
-
-// RUN: %{compile} | %{run} | FileCheck %s
-
-func.func @entry() {
- // Set the vector length to 256-bit (equivalent to vscale=2).
- // This allows the checks (below) to look at an entire vector.
- %c256 = arith.constant 256 : i32
- func.call @setArmVLBits(%c256) : (i32) -> ()
- func.call @test_deinterleave() : () -> ()
- return
-}
-
-func.func @test_deinterleave() {
- %step_vector = llvm.intr.experimental.stepvector : vector<[4]xi8>
- vector.print %step_vector : vector<[4]xi8>
- // CHECK: ( 0, 1, 2, 3, 4, 5, 6, 7 )
- %v1, %v2 = vector.deinterleave %step_vector : vector<[4]xi8> -> vector<[2]xi8>
- vector.print %v1 : vector<[2]xi8>
- vector.print %v2 : vector<[2]xi8>
- // CHECK: ( 0, 2, 4, 6 )
- // CHECK: ( 1, 3, 5, 7 )
- return
-}
-
-func.func private @setArmVLBits(%bits : i32)
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-setArmVLBits.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-setArmVLBits.mlir
deleted file mode 100644
index aa8d0e4d5104a..0000000000000
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-setArmVLBits.mlir
+++ /dev/null
@@ -1,46 +0,0 @@
-// DEFINE: %{entry_point} = main
-// DEFINE: %{compile} = mlir-opt %s -test-lower-to-llvm
-// DEFINE: %{run} = %mcr_aarch64_cmd -march=aarch64 -mattr=+sve \
-// DEFINE: -e %{entry_point} -entry-point-result=void \
-// DEFINE: -shared-libs=%mlir_runner_utils,%mlir_c_runner_utils,%mlir_arm_runner_utils
-
-// RUN: %{compile} | %{run} | FileCheck %s
-
-func.func @checkVScale() {
- %vscale = vector.vscale
- vector.print str "vscale = "
- vector.print %vscale : index
- return
-}
-
-func.func @setAndCheckVL(%bits: i32) {
- func.call @setArmVLBits(%bits) : (i32) -> ()
- func.call @checkVScale() : () -> ()
- return
-}
-
-func.func @main() {
- // CHECK: vscale = 1
- %c128 = arith.constant 128 : i32
- func.call @setAndCheckVL(%c128) : (i32) -> ()
-
- // CHECK: vscale = 2
- %c256 = arith.constant 256 : i32
- func.call @setAndCheckVL(%c256) : (i32) -> ()
-
- // CHECK: vscale = 4
- %c512 = arith.constant 512 : i32
- func.call @setAndCheckVL(%c512) : (i32) -> ()
-
- // CHECK: vscale = 8
- %c1024 = arith.constant 1024 : i32
- func.call @setAndCheckVL(%c1024) : (i32) -> ()
-
- // CHECK: vscale = 16
- %c2048 = arith.constant 2048 : i32
- func.call @setAndCheckVL(%c2048) : (i32) -> ()
-
- return
-}
-
-func.func private @setArmVLBits(%bits : i32)
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg
index 37d3a74874ce4..ec61ead8838ba 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg
@@ -7,3 +7,8 @@ if not config.mlir_run_arm_sve_tests:
# No JIT on win32.
if sys.platform == "win32":
config.unsupported = True
+
+# The tests in this folder assume full control of the hardware features, such as
+# the vector length, so must be run under an emulator.
+if not config.arm_emulator_executable:
+ config.unsupported = True
diff --git a/mlir/test/lit.cfg.py b/mlir/test/lit.cfg.py
index 9ed3a2efcb8f7..525feac8f9a14 100644
--- a/mlir/test/lit.cfg.py
+++ b/mlir/test/lit.cfg.py
@@ -250,3 +250,6 @@ def have_host_jit_feature_support(feature_name):
if config.run_rocm_tests:
config.available_features.add("host-supports-amdgpu")
+
+if config.arm_emulator_executable:
+ config.available_features.add("arm-emulator-executable")
|
|
@llvm/pr-subscribers-mlir-vector Author: Mubashar Ahmad (mub-at-arm) ChangesThe "Emulated" sub-directory under "ArmSVE" has Full diff: https://github.com/llvm/llvm-project/pull/94742.diff 5 Files Affected:
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/lit.local.cfg b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/lit.local.cfg
deleted file mode 100644
index 0d8ad605f598f..0000000000000
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/lit.local.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# The tests in this folder assume full control of the hardware features, such as
-# the vector length, so must be run under an emulator.
-
-if not config.arm_emulator_executable:
- config.unsupported = True
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-scalable-deinterleave.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-scalable-deinterleave.mlir
deleted file mode 100644
index e6c561437132f..0000000000000
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-scalable-deinterleave.mlir
+++ /dev/null
@@ -1,30 +0,0 @@
-// DEFINE: %{entry_point} = entry
-// DEFINE: %{compile} = mlir-opt %s -test-lower-to-llvm
-// DEFINE: %{run} = %mcr_aarch64_cmd -march=aarch64 -mattr=+sve \
-// DEFINE: -e %{entry_point} -entry-point-result=void \
-// DEFINE: -shared-libs=%mlir_c_runner_utils,%mlir_arm_runner_utils
-
-// RUN: %{compile} | %{run} | FileCheck %s
-
-func.func @entry() {
- // Set the vector length to 256-bit (equivalent to vscale=2).
- // This allows the checks (below) to look at an entire vector.
- %c256 = arith.constant 256 : i32
- func.call @setArmVLBits(%c256) : (i32) -> ()
- func.call @test_deinterleave() : () -> ()
- return
-}
-
-func.func @test_deinterleave() {
- %step_vector = llvm.intr.experimental.stepvector : vector<[4]xi8>
- vector.print %step_vector : vector<[4]xi8>
- // CHECK: ( 0, 1, 2, 3, 4, 5, 6, 7 )
- %v1, %v2 = vector.deinterleave %step_vector : vector<[4]xi8> -> vector<[2]xi8>
- vector.print %v1 : vector<[2]xi8>
- vector.print %v2 : vector<[2]xi8>
- // CHECK: ( 0, 2, 4, 6 )
- // CHECK: ( 1, 3, 5, 7 )
- return
-}
-
-func.func private @setArmVLBits(%bits : i32)
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-setArmVLBits.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-setArmVLBits.mlir
deleted file mode 100644
index aa8d0e4d5104a..0000000000000
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/Emulated/test-setArmVLBits.mlir
+++ /dev/null
@@ -1,46 +0,0 @@
-// DEFINE: %{entry_point} = main
-// DEFINE: %{compile} = mlir-opt %s -test-lower-to-llvm
-// DEFINE: %{run} = %mcr_aarch64_cmd -march=aarch64 -mattr=+sve \
-// DEFINE: -e %{entry_point} -entry-point-result=void \
-// DEFINE: -shared-libs=%mlir_runner_utils,%mlir_c_runner_utils,%mlir_arm_runner_utils
-
-// RUN: %{compile} | %{run} | FileCheck %s
-
-func.func @checkVScale() {
- %vscale = vector.vscale
- vector.print str "vscale = "
- vector.print %vscale : index
- return
-}
-
-func.func @setAndCheckVL(%bits: i32) {
- func.call @setArmVLBits(%bits) : (i32) -> ()
- func.call @checkVScale() : () -> ()
- return
-}
-
-func.func @main() {
- // CHECK: vscale = 1
- %c128 = arith.constant 128 : i32
- func.call @setAndCheckVL(%c128) : (i32) -> ()
-
- // CHECK: vscale = 2
- %c256 = arith.constant 256 : i32
- func.call @setAndCheckVL(%c256) : (i32) -> ()
-
- // CHECK: vscale = 4
- %c512 = arith.constant 512 : i32
- func.call @setAndCheckVL(%c512) : (i32) -> ()
-
- // CHECK: vscale = 8
- %c1024 = arith.constant 1024 : i32
- func.call @setAndCheckVL(%c1024) : (i32) -> ()
-
- // CHECK: vscale = 16
- %c2048 = arith.constant 2048 : i32
- func.call @setAndCheckVL(%c2048) : (i32) -> ()
-
- return
-}
-
-func.func private @setArmVLBits(%bits : i32)
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg
index 37d3a74874ce4..ec61ead8838ba 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg
@@ -7,3 +7,8 @@ if not config.mlir_run_arm_sve_tests:
# No JIT on win32.
if sys.platform == "win32":
config.unsupported = True
+
+# The tests in this folder assume full control of the hardware features, such as
+# the vector length, so must be run under an emulator.
+if not config.arm_emulator_executable:
+ config.unsupported = True
diff --git a/mlir/test/lit.cfg.py b/mlir/test/lit.cfg.py
index 9ed3a2efcb8f7..525feac8f9a14 100644
--- a/mlir/test/lit.cfg.py
+++ b/mlir/test/lit.cfg.py
@@ -250,3 +250,6 @@ def have_host_jit_feature_support(feature_name):
if config.run_rocm_tests:
config.available_features.add("host-supports-amdgpu")
+
+if config.arm_emulator_executable:
+ config.available_features.add("arm-emulator-executable")
|
MacDue
reviewed
Jun 7, 2024
banach-space
reviewed
Jun 7, 2024
There was a problem hiding this comment.
Thanks @mub-at-arm - I love this clean-up! One small suggestion. Btw, is the Emulated dir deleted in this PR? Doesn't seem to be, but I'm also known to misinterpret GitHub's diffs :)
mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-deinterleave.mlir
Outdated
Show resolved
Hide resolved
|
Btw, there's also an |
MacDue
reviewed
Jun 7, 2024
The "Emulated" sub-directory under "ArmSVE" and "ArmSME" have been removed. Associated tests have been moved up a directory and now include the "REQUIRES" constraint for the arm-emulator.
|
@banach-space Yes the emulated folder should be deleted. GitHub is only showing it, the folder no longer exists. |
Closed
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
The "Emulated" sub-directories under "ArmSVE" and
"ArmSME" have been removed. Associated tests
have been moved up a directory and now include
the "REQUIRES" constraint for the arm-emulator.