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[CodeGen] Preserved additional analyses in StackSlotColoring pass. #93779

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vg0204
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@vg0204 vg0204 commented May 30, 2024

The pass pipeline of some architecture splits register allocation phase based on different register classes. As some analyses need to be computed at the beginning of the register allocation and kept alive till all values are assigned to some physical registers.

This poses challenge with objective of introducing StackSlotColoring after partial virtual registers are assigned to physical registers, in order to optimize stack slots usage.As this pass doesn't preserve few analysis yet to be needed by the register allocation of the remaining virtual registers, necessiating them to be kept preserved.

@vg0204 vg0204 self-assigned this May 30, 2024
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github-actions bot commented May 30, 2024

✅ With the latest revision this PR passed the C/C++ code formatter.

@vg0204 vg0204 force-pushed the vg0204/preserve-analysis-in-StackSlotColoring branch from 6ea80f6 to dc21436 Compare May 30, 2024 07:55
The pass pipeline of some architecture splits register allocation
phase based on different register classes. As some analyses need to
be computed at the beginning of the register allocation and kept
alive till all values are assigned to some physical registers.

This poses challenge with objective of introducing StackSlotColoring
after partial virtual registers are assigned to physical registers,
in order to optimize stack slots usage.As this pass doesn't preserve
few analysis yet to be needed by the register allocation of the
remaining virtual registers, necessiating them to be kept preserved.
@cdevadas
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cdevadas commented Jun 3, 2024

Don't merge this patch now. Wait for the other patch to get approved.

@vg0204
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vg0204 commented Jun 3, 2024

e this patch now. Wait for the other patch to get ap

But, the other patch depends upon this. Unless this changes are not present there, many of the existing test cases would fail there, including the one I added. So it won't get approved.

@vg0204 vg0204 requested a review from arsenm June 3, 2024 11:31
@vg0204
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vg0204 commented Jun 5, 2024

Did anymore change or any wait is needed (maybe because of dependency on other patch) to merge this PR.

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arsenm commented Jun 6, 2024

Don't merge this patch now. Wait for the other patch to get approved.

Don't see a reason to wait on that, this is fine standalone

@@ -13,6 +13,7 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/LiveDebugVariables.h"
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Could probably avoid the include by using the PassID

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@vg0204 vg0204 Jun 6, 2024

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For that, "char &llvm::passID = pass::ID", need to be added in the respective pass (not presently there in LiveDebugVariables.cpp), followed by exposing it via extern in Passes.h. So, I think this is better option.

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But those should be there

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As I was going through the Codegen passes, while most of them have it, others don't. What should be the right practice?

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They all should (but the PassID will go away in new PM so it's probably not worth fixing all of the missing instances)

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So, what should be supposed to be my final take on it!

llvm/lib/CodeGen/StackSlotColoring.cpp Outdated Show resolved Hide resolved
// split into multiple phases based on register class. So, this pass
// may be invoked multiple times requiring it to save these analyses to be
// used by RA later.
AU.addPreserved<LiveIntervals>();
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Do you need to addPreserved<SlotIndexes>? I'm also surprised you don't need to refer to LiveIntervals to maintain them?

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@vg0204 vg0204 Jun 6, 2024

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"addPreserved < SlotIndexes > " was already there before. As for LiveIntervals, it would be needed to be preserved for maybe the upcoming regAlloc pass for remaining register classes, else it is being re-computed, which somehow creating problem.

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llvmbot commented Jun 6, 2024

@llvm/pr-subscribers-llvm-regalloc

Author: Vikash Gupta (vg0204)

Changes

The pass pipeline of some architecture splits register allocation phase based on different register classes. As some analyses need to be computed at the beginning of the register allocation and kept alive till all values are assigned to some physical registers.

This poses challenge with objective of introducing StackSlotColoring after partial virtual registers are assigned to physical registers, in order to optimize stack slots usage.As this pass doesn't preserve few analysis yet to be needed by the register allocation of the remaining virtual registers, necessiating them to be kept preserved.


Full diff: https://github.com/llvm/llvm-project/pull/93779.diff

1 Files Affected:

  • (modified) llvm/lib/CodeGen/StackSlotColoring.cpp (+14-1)
diff --git a/llvm/lib/CodeGen/StackSlotColoring.cpp b/llvm/lib/CodeGen/StackSlotColoring.cpp
index 9fdc8a338b52a..eb7d730e236bf 100644
--- a/llvm/lib/CodeGen/StackSlotColoring.cpp
+++ b/llvm/lib/CodeGen/StackSlotColoring.cpp
@@ -13,6 +13,7 @@
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
+#include "llvm/CodeGen/LiveDebugVariables.h"
 #include "llvm/CodeGen/LiveInterval.h"
 #include "llvm/CodeGen/LiveIntervalUnion.h"
 #include "llvm/CodeGen/LiveIntervals.h"
@@ -64,6 +65,7 @@ namespace {
     MachineFrameInfo *MFI = nullptr;
     const TargetInstrInfo *TII = nullptr;
     const MachineBlockFrequencyInfo *MBFI = nullptr;
+    SlotIndexes *Indexes = nullptr;
 
     // SSIntervals - Spill slot intervals.
     std::vector<LiveInterval*> SSIntervals;
@@ -152,6 +154,14 @@ namespace {
       AU.addRequired<MachineBlockFrequencyInfo>();
       AU.addPreserved<MachineBlockFrequencyInfo>();
       AU.addPreservedID(MachineDominatorsID);
+
+      // In some Target's pipeline, register allocation (RA) might be
+      // split into multiple phases based on register class. So, this pass
+      // may be invoked multiple times requiring it to save these analyses to be
+      // used by RA later.
+      AU.addPreserved<LiveIntervals>();
+      AU.addPreserved<LiveDebugVariables>();
+
       MachineFunctionPass::getAnalysisUsage(AU);
     }
 
@@ -496,8 +506,10 @@ bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
     ++I;
   }
 
-  for (MachineInstr *MI : toErase)
+  for (MachineInstr *MI : toErase) {
     MI->eraseFromParent();
+    Indexes->removeMachineInstrFromMaps(*MI);
+  }
 
   return changed;
 }
@@ -515,6 +527,7 @@ bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
   TII = MF.getSubtarget().getInstrInfo();
   LS = &getAnalysis<LiveStacks>();
   MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+  Indexes = &getAnalysis<SlotIndexes>();
 
   bool Changed = false;
 

llvm/lib/CodeGen/StackSlotColoring.cpp Outdated Show resolved Hide resolved
@@ -496,8 +506,12 @@ bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
++I;
}

for (MachineInstr *MI : toErase)
for (MachineInstr *MI : toErase) {
if (Indexes) {
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Don't need braces

@vg0204 vg0204 force-pushed the vg0204/preserve-analysis-in-StackSlotColoring branch from 0c526ed to c56007d Compare June 10, 2024 16:13
@vg0204 vg0204 merged commit e9a3623 into llvm:main Jun 11, 2024
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Lukacma pushed a commit to Lukacma/llvm-project that referenced this pull request Jun 12, 2024
…lvm#93779)

The pass pipeline of some architecture splits register allocation phase
based on different register classes. As some analyses need to be
computed at the beginning of the register allocation and kept alive till
all values are assigned to some physical registers.

This poses challenge with objective of introducing StackSlotColoring
after partial virtual registers are assigned to physical registers, in
order to optimize stack slots usage.As this pass doesn't preserve few
analysis yet to be needed by the register allocation of the remaining
virtual registers, necessiating them to be kept preserved.
@HerrCai0907 HerrCai0907 mentioned this pull request Jun 13, 2024
vg0204 added a commit that referenced this pull request Jun 18, 2024
This PR is dependent on
[#93779](#93779).

As currently, each SGPR Spills are lowered to go into distinct stack
slots in stack frame after SGPR allocation phase. Therefore, this patch
utilizes the capability of StackSlotColoring to ensure the stack slot
sharing if possible for stack frame index, where the SGPR spills are
occuring in the non-interfering region.

StackSlotColoring is introduced immediately after SGPR register
allocation, just to ensure that any further lowering happens on the
optimally allocated stack slots, with certain flags to indicate the
preservation of certain analysis result later to be used by RA of other
register classes.
AlexisPerry pushed a commit to llvm-project-tlp/llvm-project that referenced this pull request Jul 9, 2024
This PR is dependent on
[llvm#93779](llvm#93779).

As currently, each SGPR Spills are lowered to go into distinct stack
slots in stack frame after SGPR allocation phase. Therefore, this patch
utilizes the capability of StackSlotColoring to ensure the stack slot
sharing if possible for stack frame index, where the SGPR spills are
occuring in the non-interfering region.

StackSlotColoring is introduced immediately after SGPR register
allocation, just to ensure that any further lowering happens on the
optimally allocated stack slots, with certain flags to indicate the
preservation of certain analysis result later to be used by RA of other
register classes.
@vg0204 vg0204 deleted the vg0204/preserve-analysis-in-StackSlotColoring branch August 6, 2024 11:57
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4 participants