[llvm][ARM] Make cortex-m85 imply trustzone.

[alexrp]

See: https://developer.arm.com/documentation/102787/0300

Note: I don't have commit access.

[llvmbot]

@llvm/pr-subscribers-backend-arm

Author: Alex Rønne Petersen (alexrp)

Changes

See: https://developer.arm.com/documentation/102787/0300

Note: I don't have commit access.

---

Full diff: https://github.com/llvm/llvm-project/pull/109770.diff

1 Files Affected:

• (modified) llvm/lib/Target/ARM/ARMProcessors.td (+1)

diff --git a/llvm/lib/Target/ARM/ARMProcessors.td b/llvm/lib/Target/ARM/ARMProcessors.td
index e4e122a0d1339b..cc871657e46895 100644
--- a/llvm/lib/Target/ARM/ARMProcessors.td
+++ b/llvm/lib/Target/ARM/ARMProcessors.td
@@ -382,6 +382,7 @@ def : ProcessorModel<"cortex-m55", CortexM55Model,      [ARMv81mMainline,
                                                          FeatureFixCMSE_CVE_2021_35465]>;
 
 def : ProcessorModel<"cortex-m85", CortexM85Model,      [ARMv81mMainline,
+                                                         FeatureTrustZone,
                                                          FeatureDSP,
                                                          FeatureFPARMv8_D16,
                                                          FeaturePACBTI,

[davemgreen]

Hi

I'm pretty sure the TrustZone is the AArch32 A-profile extension. Trustzone for Cortex-M is CMSE in the compiler, which is Feature8MSecExt and should be included already via ARMv81mMainline.

[alexrp]

Hi Dave,

Looks like you're right! Thanks for the clarification.

For context, I'm looking to upstream some changes that we made to implied features for some Arm CPUs in Zig. But it seems at least this particular change was made in error.