[InstCombine] Miscompilation which converts icmp eq (trunc nsw i64 X), (trunc nsw i32 Y) into icmp eq (zext i32 Y), X

[dtcxzyw]

Reduced test case: https://alive2.llvm.org/ce/z/MLgA5x

target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

define i32 @src() {
entry:
  br label %for.cond

for.cond:                                         ; preds = %if.end, %entry
  %storemerge = phi i32 [ 3, %entry ], [ %dec, %if.end ]
  %h = phi i32 [ 1, %entry ], [ %hres, %if.end ]
  %e = phi i32 [ 0, %entry ], [ -1, %if.end ]
  %tobool.not = icmp eq i32 %storemerge, 0
  br i1 %tobool.not, label %for.end9, label %for.body

for.body:                                         ; preds = %for.cond
  %cmp = icmp eq i32 %h, 5
  %conv1 = zext i1 %cmp to i64
  %conv2 = sext i32 %e to i64
  %cond.i = call i64 @llvm.umax.i64(i64 %conv1, i64 %conv2)
  %conv3 = trunc nsw i64 %cond.i to i16
  %conv4 = trunc nsw i32 %e to i16
  %sub.i = sub i16 %conv3, %conv4
  %tobool6.not = icmp eq i16 %sub.i, 0
  br i1 %tobool6.not, label %if.end, label %if.then

if.then:                                          ; preds = %for.body
  br label %if.end

if.end:                                           ; preds = %if.then, %for.body
  %hres = phi i32 [ 0, %if.then ], [ %h, %for.body ]
  %dec = add nsw i32 %storemerge, -1
  br label %for.cond

for.end9:                                         ; preds = %for.cond
  ret i32 %h
}

define i32 @tgt() {
entry:
  br label %for.cond

for.cond:                                         ; preds = %if.end, %entry
  %storemerge = phi i32 [ 3, %entry ], [ %dec, %if.end ]
  %h = phi i32 [ 1, %entry ], [ %hres, %if.end ]
  %e = phi i32 [ 0, %entry ], [ -1, %if.end ]
  %tobool.not = icmp eq i32 %storemerge, 0
  br i1 %tobool.not, label %for.end9, label %for.body

for.body:                                         ; preds = %for.cond
  %cmp = icmp eq i32 %h, 5
  %conv1 = zext i1 %cmp to i64
  %conv2 = sext i32 %e to i64
  %cond.i = call i64 @llvm.umax.i64(i64 %conv1, i64 %conv2)
  %0 = zext i32 %e to i64
  %tobool6.not = icmp eq i64 %cond.i, %0
  br i1 %tobool6.not, label %if.end, label %if.then

if.then:                                          ; preds = %for.body
  br label %if.end

if.end:                                           ; preds = %if.then, %for.body
  %hres = phi i32 [ 0, %if.then ], [ %h, %for.body ]
  %dec = add nsw i32 %storemerge, -1
  br label %for.cond

for.end9:                                         ; preds = %for.cond
  ret i32 %h
}

llvm version: de9b386

[dtcxzyw]

Reduced test case: https://alive2.llvm.org/ce/z/ndR8PQ

target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

define i1 @src(i64 %x, i32 %y) {
  %conv1 = trunc nsw i64 %x to i16
  %conv2 = trunc nsw i32 %y to i16
  %cond = icmp eq i16 %conv1, %conv2
  ret i1 %cond
}

define i1 @tgt(i64 %x, i32 %y) {
  %1 = zext i32 %y to i64
  %cond = icmp eq i64 %1, %x
  ret i1 %cond
}

It should be caused by #90436.

I will post a fix later. cc @nikic

[dtcxzyw]

POC without DataLayout:

define i1 @test_eq(i32 %x, i16 %y) {
  %conv1 = trunc nsw i32 %x to i8
  %conv2 = trunc nsw i16 %y to i8
  %cond = icmp eq i8 %conv1, %conv2
  ret i1 %cond
}

define i1 @test_ult(i32 %x, i16 %y) {
  %conv1 = trunc nsw i32 %x to i8
  %conv2 = trunc nsw i16 %y to i8
  %cond = icmp ult i8 %conv1, %conv2
  ret i1 %cond
}

define i1 @test_slt(i32 %x, i16 %y) {
  %conv1 = trunc nsw i32 %x to i8
  %conv2 = trunc nsw i16 %y to i8
  %cond = icmp slt i8 %conv1, %conv2
  ret i1 %cond
}