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[Sparc] Replace CMP instructions with InstAlias (NFCI) (#66859)
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According to the manual `cmp` is a synthetic instruction that maps to
`subcc` with %g0 output operand. Make it so.

The change required some changes to instruction selection process. The
reason is that the old CMP did not have an output operand, while setcc
does have one. We want that operand to be %g0. The easiest way to
achieve this seems to be to mark SUBCC with hasPostISelHook and replace
the output operand with %g0 in the corresponding TargetLowering method.
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s-barannikov authored Oct 9, 2023
1 parent 7cfe32d commit c98bf1e
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Showing 5 changed files with 24 additions and 17 deletions.
8 changes: 8 additions & 0 deletions llvm/lib/Target/Sparc/SparcISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3642,3 +3642,11 @@ void SparcTargetLowering::insertSSPDeclarations(Module &M) const {
if (!Subtarget->isTargetLinux())
return TargetLowering::insertSSPDeclarations(M);
}

void SparcTargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
SDNode *Node) const {
assert(MI.getOpcode() == SP::SUBCCrr || MI.getOpcode() == SP::SUBCCri);
// If the result is dead, replace it with %g0.
if (!Node->hasAnyUseOfValue(0))
MI.getOperand(0).setReg(SP::G0);
}
5 changes: 4 additions & 1 deletion llvm/lib/Target/Sparc/SparcISelLowering.h
Original file line number Diff line number Diff line change
Expand Up @@ -222,7 +222,10 @@ namespace llvm {

MachineBasicBlock *expandSelectCC(MachineInstr &MI, MachineBasicBlock *BB,
unsigned BROpcode) const;

void AdjustInstrPostInstrSelection(MachineInstr &MI,
SDNode *Node) const override;
};
} // end namespace llvm

#endif // SPARC_ISELLOWERING_H
#endif // LLVM_LIB_TARGET_SPARC_SPARCISELLOWERING_H
5 changes: 3 additions & 2 deletions llvm/lib/Target/Sparc/SparcInstr64Bit.td
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,7 @@ def : Pat<(i64 0), (COPY (i64 G0))>,
Requires<[Is64Bit]>;

// The ALU instructions want their simm13 operands as i32 immediates.
// FIXME: This is no longer true, they are now pointer-sized.
def as_i32imm : SDNodeXForm<imm, [{
return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i32);
}]>;
Expand Down Expand Up @@ -173,8 +174,8 @@ def TLS_ADDXrr : F3_1<2, 0b000000, (outs I64Regs:$rd),
(tlsadd i64:$rs1, i64:$rs2, tglobaltlsaddr:$sym))]>;
}

def : Pat<(SPcmpicc i64:$a, i64:$b), (CMPrr $a, $b)>;
def : Pat<(SPcmpicc i64:$a, (i64 simm13:$b)), (CMPri $a, (as_i32imm $b))>;
def : Pat<(SPcmpicc i64:$lhs, i64:$rhs), (SUBCCrr $lhs, $rhs)>;
def : Pat<(SPcmpicc i64:$lhs, (i64 simm13:$rhs)), (SUBCCri $lhs, imm:$rhs)>;
def : Pat<(i64 (ctpop i64:$src)), (POPCrr $src)>;

} // Predicates = [Is64Bit]
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7 changes: 5 additions & 2 deletions llvm/lib/Target/Sparc/SparcInstrAliases.td
Original file line number Diff line number Diff line change
Expand Up @@ -413,10 +413,13 @@ defm : reg_cond_alias<"gez", 0b111>;
// non-alias form, except for the most obvious and clarifying aliases: cmp, jmp,
// call, tst, ret, retl.

// Note: cmp is handled in SparcInstrInfo.
// jmp/call/ret/retl have special case handling for output in
// Note: jmp/call/ret/retl have special case handling for output in
// SparcInstPrinter.cpp

// cmp rs1, reg_or_imm -> subcc rs1, reg_or_imm, %g0
def : InstAlias<"cmp $rs1, $rs2", (SUBCCrr G0, IntRegs:$rs1, IntRegs:$rs2)>;
def : InstAlias<"cmp $rs1, $imm", (SUBCCri G0, IntRegs:$rs1, simm13Op:$imm)>;

// jmp addr -> jmpl addr, %g0
def : InstAlias<"jmp $addr", (JMPLrr G0, MEMrr:$addr), 0>;
def : InstAlias<"jmp $addr", (JMPLri G0, MEMri:$addr), 0>;
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16 changes: 4 additions & 12 deletions llvm/lib/Target/Sparc/SparcInstrInfo.td
Original file line number Diff line number Diff line change
Expand Up @@ -222,6 +222,7 @@ def calltarget : Operand<i32> {
}

def simm13Op : Operand<iPTR> {
let OperandType = "OPERAND_IMMEDIATE";
let DecoderMethod = "DecodeSIMM13";
let EncoderMethod = "getSImm13OpValue";
}
Expand Down Expand Up @@ -829,23 +830,14 @@ defm SUB : F3_12 <"sub" , 0b000100, sub, IntRegs, i32, simm13Op>;
let Uses = [ICC], Defs = [ICC] in
defm SUBE : F3_12 <"subxcc" , 0b011100, sube, IntRegs, i32, simm13Op>;

let Defs = [ICC] in
let Defs = [ICC], hasPostISelHook = true in
defm SUBCC : F3_12 <"subcc", 0b010100, subc, IntRegs, i32, simm13Op>;

let Uses = [ICC] in
defm SUBC : F3_12np <"subx", 0b001100>;

// cmp (from Section A.3) is a specialized alias for subcc
let Defs = [ICC], rd = 0 in {
def CMPrr : F3_1<2, 0b010100,
(outs), (ins IntRegs:$rs1, IntRegs:$rs2),
"cmp $rs1, $rs2",
[(SPcmpicc i32:$rs1, i32:$rs2)]>;
def CMPri : F3_2<2, 0b010100,
(outs), (ins IntRegs:$rs1, simm13Op:$simm13),
"cmp $rs1, $simm13",
[(SPcmpicc i32:$rs1, (i32 simm13:$simm13))]>;
}
def : Pat<(SPcmpicc i32:$lhs, i32:$rhs), (SUBCCrr $lhs, $rhs)>;
def : Pat<(SPcmpicc i32:$lhs, (i32 simm13:$rhs)), (SUBCCri $lhs, imm:$rhs)>;

// Section B.18 - Multiply Instructions, p. 113
let Defs = [Y] in {
Expand Down

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