Check soft float

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -27069,15 +27069,17 @@ AArch64TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {
 
 // Return true if the atomic operation expansion will lower to use a library
 // call, and is thus ineligible to use an LLSC expansion.
-static bool rmwOpMayLowerToLibcall(const AtomicRMWInst *RMW) {
+static bool rmwOpMayLowerToLibcall(const AArch64Subtarget &Subtarget,
+                                   const AtomicRMWInst *RMW) {
   if (!RMW->isFloatingPointOperation())
     return false;
   switch (RMW->getType()->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
   case Type::DoubleTyID:
   case Type::HalfTyID:
   case Type::BFloatTyID:
-    return false;
+    // Will use soft float
+    return !Subtarget.hasFPARMv8();
   default:
     // fp128 will emit library calls.
     return true;
@@ -27132,7 +27134,7 @@ AArch64TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
   // succeed. So at -O0 lower this operation to a CAS loop. Also worthwhile if
   // we have a single CAS instruction that can replace the loop.
   if (getTargetMachine().getOptLevel() == CodeGenOptLevel::None ||
-      Subtarget->hasLSE() || rmwOpMayLowerToLibcall(AI))
+      Subtarget->hasLSE() || rmwOpMayLowerToLibcall(*Subtarget, AI))
     return AtomicExpansionKind::CmpXChg;
 
   return AtomicExpansionKind::LLSC;