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[CIR][CIRGen][Builtin][Neon] Lower builtin_neon_vqshld_n s64 and u64 #1385

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Merged
merged 1 commit into from
Feb 22, 2025
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[CIR][CIRGen][Builtin][Neon] Lower builtin_neon_vqshld_n s64 and u64 #1385

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12 changes: 11 additions & 1 deletion clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3832,7 +3832,17 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
}
case NEON::BI__builtin_neon_vqshld_n_u64:
case NEON::BI__builtin_neon_vqshld_n_s64: {
llvm_unreachable("NEON::BI__builtin_neon_vqshld_n_s64 NYI");
cir::IntType IntType = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64
? builder.getUInt64Ty()
: builder.getSInt64Ty();

const StringRef Intrinsic = BuiltinID == NEON::BI__builtin_neon_vqshld_n_u64
? "aarch64.neon.uqshl"
: "aarch64.neon.sqshl";
Ops.push_back(emitScalarExpr(E->getArg(1)));
Ops[1] = builder.createIntCast(Ops[1], IntType);
return emitNeonCall(builder, {IntType, IntType}, Ops, Intrinsic, IntType,
getLoc(E->getExprLoc()));
}
case NEON::BI__builtin_neon_vrshrd_n_u64:
case NEON::BI__builtin_neon_vrshrd_n_s64: {
Expand Down
32 changes: 20 additions & 12 deletions clang/test/CIR/CodeGen/AArch64/neon.c
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Original file line number Diff line number Diff line change
Expand Up @@ -15464,12 +15464,16 @@ uint64_t test_vshld_n_u64(uint64_t a) {
// return (int32_t)vqshls_n_s32(a, 31);
// }

// NYI-LABEL: @test_vqshld_n_s64(
// NYI: [[VQSHL_N:%.*]] = call i64 @llvm.aarch64.neon.sqshl.i64(i64 %a, i64 63)
// NYI: ret i64 [[VQSHL_N]]
// int64_t test_vqshld_n_s64(int64_t a) {
// return (int64_t)vqshld_n_s64(a, 63);
// }
int64_t test_vqshld_n_s64(int64_t a) {
return (int64_t)vqshld_n_s64(a, 63);

// CIR-LABEL: vqshld_n_s64
// CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.sqshl" {{.*}}, {{.*}} : (!s64i, !s64i) -> !s64i

// LLVM-LABEL: @test_vqshld_n_s64(
// LLVM: [[VQSHL_N:%.*]] = call i64 @llvm.aarch64.neon.sqshl.i64(i64 %0, i64 63)
// LLVM: ret i64 [[VQSHL_N]]
}

// NYI-LABEL: @test_vqshl_n_s8(
// NYI: [[VQSHL_N:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> %a, <8 x i8> zeroinitializer)
Expand Down Expand Up @@ -15623,12 +15627,16 @@ uint64_t test_vshld_n_u64(uint64_t a) {
// return (uint32_t)vqshls_n_u32(a, 31);
// }

// NYI-LABEL: @test_vqshld_n_u64(
// NYI: [[VQSHL_N:%.*]] = call i64 @llvm.aarch64.neon.uqshl.i64(i64 %a, i64 63)
// NYI: ret i64 [[VQSHL_N]]
// uint64_t test_vqshld_n_u64(uint64_t a) {
// return (uint64_t)vqshld_n_u64(a, 63);
// }
uint64_t test_vqshld_n_u64(uint64_t a) {
return (uint64_t)vqshld_n_u64(a, 63);

// CIR-LABEL: vqshld_n_u64
// CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.uqshl" {{.*}}, {{.*}} : (!u64i, !u64i) -> !u64i

// LLVM-LABEL: @test_vqshld_n_u64(
// LLVM: [[VQSHL_N:%.*]] = call i64 @llvm.aarch64.neon.uqshl.i64(i64 %0, i64 63)
// LLVM: ret i64 [[VQSHL_N]]
}

// NYI-LABEL: @test_vqshl_n_u64(
// NYI: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
Expand Down
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