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net: ks8851: Add delay after vdd regulator enable
The reset gpio of KSZ8851 on the RevPi Core and RevPi Connect is inverted. The reset circuit also has a buffer which keeps the KSZ8851 upto 80ms in reset even if the reset pin was released. To workaround the issue without totally breaking the driver on other boards the reset is implemented as a fixed regulator. This makes it possible to workaround the inverted polarity and the 80ms of the buffer. The actuall reset of at least 10ms is not reached with this workaround. So we add an extra delay after the vdd regulator is enabled. Signed-off-by: Philipp Rosenberger <p.rosenberger@kunbus.com>
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