Far path for fpu adder/subtractor #3270
main.yml
on: pull_request
Synthesize full core
51s
Build regression tests (riscv-tests)
43s
Build regression tests (riscv-arch-test)
41s
Run unit tests
10m 47s
Check code formatting and typing
27s
Run regression tests (riscv-tests)
5m 44s
Run regression tests (riscv-arch-test)
17m 18s
Artifacts
Produced during runtime
Name | Size | |
---|---|---|
verilog-full-core
|
738 KB |
|