Managed to write hello world from user process

kth-step · Jan 13, 2025 · ec950fb · ec950fb
1 parent 5f313c2
commit ec950fb
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Showing 4 changed files with 36 additions and 3 deletions.
diff --git a/common/inc/plat/qemu_esp32c3.h b/common/inc/plat/qemu_esp32c3.h
@@ -26,6 +26,7 @@
 	{                                                             \
 		[0] = cap_mk_pmp(pmp_napot_encode(0x42000000 + 0x10000, 0x10000), MEM_RWX),                \
 		[1] = cap_mk_pmp(pmp_napot_encode(0x3FC80000 + 0x10000, 0x10000), MEM_RWX),                \
+		[2] = cap_mk_pmp(pmp_napot_encode(0x60000000, 0x10000), MEM_RWX),                \
 		[4] = cap_mk_time(0, 0, S3K_SLOT_CNT),							\
 		[8] = cap_mk_monitor(0, S3K_PROC_CNT),                \
 		[9] = cap_mk_channel(0, S3K_CHAN_CNT),                \

diff --git a/common/src/drivers/esp32c3.c b/common/src/drivers/esp32c3.c
@@ -1,16 +1,47 @@
 #include "drivers/uart.h"
 #include "drivers/time.h"
 
+#define UART_BASE_ADDR  0x60000000  // Example base address for UART0 (check TRM)
+#define UART_FIFO_REG   (UART_BASE_ADDR + 0x0)  // TX/RX FIFO register
+#define UART_CONF0_REG  (UART_BASE_ADDR + 0x20) // UART configuration
+#define UART_CLKDIV_REG (UART_BASE_ADDR + 0x24) // UART clock divider register
+
+#define UART_BAUDRATE   115200
+#define APB_CLK_FREQ    80000000  // ESP32-C3 APB clock frequency
+
+// Write a 32-bit value to a memory-mapped register
+static inline void write_reg(uint32_t addr, uint32_t value) {
+    *((volatile uint32_t *)addr) = value;
+}
+
+// Read a 32-bit value from a memory-mapped register
+static inline uint32_t read_reg(uint32_t addr) {
+    return *((volatile uint32_t *)addr);
+}
 uint32_t uart_tx_one_char(uint8_t TxChar);
 
 void uart_init(void *base)
 {
-
+    uint32_t clk_div = APB_CLK_FREQ / UART_BAUDRATE;
+    write_reg(UART_CLKDIV_REG, clk_div);
+
+    // Configure data bits, parity, stop bits
+    // Example: 8 data bits, no parity, 1 stop bit
+    uint32_t conf0 = 0;
+    conf0 |= (0 << 0);  // 8 data bits
+    conf0 |= (0 << 2);  // No parity
+    conf0 |= (1 << 4);  // 1 stop bit
+    write_reg(UART_CONF0_REG, conf0);
 }
 
 int uart_putc(void *base, char c)
 {
-   return uart_tx_one_char(c);
+    // Wait until there is space in the FIFO
+    while ((read_reg(UART_BASE_ADDR + 0x18) & 0xFF) >= 128);  // Check TX FIFO count
+
+    // Write character to TX FIFO
+    write_reg(UART_FIFO_REG, c);
+    /* return uart_tx_one_char(c); */
 }
 
 s3k_time_t time_get(void)

diff --git a/kernel/src/proc.c b/kernel/src/proc.c
@@ -19,6 +19,7 @@ void proc_init(void)
 	procs[0].regs[REG_PC] = (val_t)_payload;
 	KASSERT(cap_pmp_load(ctable_get(0, 0), 0) == SUCCESS);
 	KASSERT(cap_pmp_load(ctable_get(0, 1), 1) == SUCCESS);
+	KASSERT(cap_pmp_load(ctable_get(0, 2), 2) == SUCCESS);
 }
 
 proc_t *proc_get(pid_t pid)

diff --git a/projects/tutorial.01.hello-world/app0/main.c b/projects/tutorial.01.hello-world/app0/main.c
@@ -6,7 +6,7 @@
 int main(void)
 {
 	// Setup UART access
-	setup_uart();
+	/* setup_uart(); */
 
 	// Write hello world.
 	alt_printf("Hello, world\n");