[LLVMGPU] Support i8 MFMA intrinsics in GPUTileAndFuse pipeline #18104
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This PR simply adds
MFMA_I8_16x16x32_I32
to the list of allowed enums inMMAAttr::populateOperandOffsetsSizesStrides
. This enables the logic to pack and lower a contraction to this intrinsic with theGPUTileAndFuse
. The layout forMFMA_I8_16x16x32_I32
is very similar to the layout forMFMA_F16_16x16x16_F32
, which is already supported, so the pipeline is already ready to handle the i8 intrinsic case. Numerical correctness has been verified on an MI300 card for a 256x256x256 matmul.