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ipbus transport axi sim #198

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merged 3 commits into from
Sep 24, 2021
Merged

ipbus transport axi sim #198

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ca46a37
#198: Reviving ipbus_transport_axi_simtb
alessandrothea Jun 4, 2021
52217b5
#198: Adding design unit to the transport ram tb
alessandrothea Sep 7, 2021
62390eb
#198: Updated ipbb image. Ram testbench sim time shortened.
alessandrothea Sep 24, 2021
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10 changes: 5 additions & 5 deletions ci/sim.yml
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@

run_sim_udp:vivado2019.2:questasim2019.2:
extends: .template_base
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-04-26__ipbbdev-2021f_uhal2.8.0
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-06-21__ipbbdev-2021i_uhal2.8.0
tags:
- docker
- docker-cap-net-admin
Expand Down Expand Up @@ -29,7 +29,7 @@ run_sim_udp:vivado2019.2:questasim2019.2:

run_sim_eth:vivado2019.2:questasim2019.2:
extends: .template_base
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-04-26__ipbbdev-2021f_uhal2.8.0
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-06-21__ipbbdev-2021i_uhal2.8.0
tags:
- docker
- docker-cap-net-admin
Expand Down Expand Up @@ -58,7 +58,7 @@ run_sim_eth:vivado2019.2:questasim2019.2:

run_ram_slaves_testbench_sim:vivado2019.2:questasim2019.2:
extends: .template_base
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-04-26__ipbbdev-2021f_uhal2.8.0
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-06-21__ipbbdev-2021i_uhal2.8.0
tags:
- docker
- docker-cap-net-admin
Expand Down Expand Up @@ -87,12 +87,12 @@ run_ram_slaves_testbench_sim:vivado2019.2:questasim2019.2:
- ipbb sim ipcores
- ipbb sim fli-udp
- ipbb sim generate-project
- ./run_sim -c work.top -do 'run 1ms' -do 'quit'
- ./run_sim -c work.top -do 'run 10us' -do 'quit'


run_ctr_slaves_testbench_sim:vivado2019.2:questasim2019.2:
extends: .template_base
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-04-26__ipbbdev-2021f_uhal2.8.0
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-06-21__ipbbdev-2021i_uhal2.8.0
tags:
- docker
- xilinx-tools
Expand Down
2 changes: 1 addition & 1 deletion ci/templates.yml
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@

.template_base:
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-04-26__ipbbdev-2021f_uhal2.8.0
image: ${IPBUS_DOCKER_REGISTRY}/ipbus-fw-dev-centos7:2021-06-21__ipbbdev-2021i_uhal2.8.0
before_script:
- source /software/Xilinx/Vivado/${VIVADO_VERSION}/settings64.sh

Expand Down
4 changes: 2 additions & 2 deletions components/ipbus_transport_axi/firmware/cfg/ipbus_transport_axi.dep
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Expand Up @@ -24,14 +24,14 @@
#-------------------------------------------------------------------------------


src ipbus_transport_axi_if.vhd
src --vhdl2008 ipbus_transport_axi_if.vhd

src ipbus_transport_ram_if.vhd
src ipbus_transport_multibuffer_if.vhd
src ipbus_transport_multibuffer_cdc.vhd
src ipbus_transport_multibuffer_rx_dpram.vhd ipbus_transport_multibuffer_tx_dpram.vhd

src ipbus_axi_decl.vhd
src --vhdl2008 ipbus_axi_decl.vhd

? toolset.lower() == "vivado" ? src ../cgn/axi_bram_ctrl_0.xci

Expand Down
10 changes: 10 additions & 0 deletions ...irmware/cfg/ipbus_transport_axi_simtb.dep → ...irmware/cfg/tb_ipbus_transport_ram_if.dep
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Original file line number Diff line number Diff line change
Expand Up @@ -23,8 +23,18 @@
#
#-------------------------------------------------------------------------------

@device_family = "none"
@device_name = "none"
@device_package = "-none"
@device_speed = "-none"
@boardname = "sim"

@sim.run_sim.design_units = "work.ipbus_transport_ram_if_simtb"

src ipbus_transport_ram_if_simtb.vhd
include ipbus_transport_axi.dep

# The following is internally used by the ipbus_transport_ram_if_simtb.
include -c components/ipbus_util ipbus_example.dep

include -c components/ipbus_core