TDC does not work as expected

iic-jku · Mar 29, 2024 · f749c82 · f749c82
1 parent e1aa67f
commit f749c82
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Showing 5 changed files with 14,603 additions and 15,401 deletions.
diff --git a/sim/tb_tt06_tdc.sch b/sim/tb_tt06_tdc.sch
@@ -6,11 +6,11 @@ V {}
 S {}
 E {}
 B 2 420 -1400 1820 -900 {flags=graph
-y1=0
-y2=1.8
+y1=-0.07
+y2=1.9
 ypos1=0
 ypos2=2
-divy=5
+divy=10
 subdivy=1
 unity=1
 x1=0
@@ -33,16 +33,17 @@ rainbow=0
 
 
 
-hilight_wave=6
-color="7 8 6 9 10 11 12 13"
+hilight_wave=11
+color="7 17 6 9 10 11 12 13 8"
 node="start
 stop
 dbg_dly[0]
 dbg_dly[1]
 dbg_dly[2]
 dbg_dly[3]
 dbg_dly[4]
-dbg_dly[5]"}
+dbg_dly[5]
+dbg_dly[15]"}
 B 2 420 -1980 1820 -1460 {flags=graph
 y1=0
 y2=2
@@ -260,7 +261,7 @@ C {devices/vdd.sym} 1330 -600 0 0 {name=l9 lab=VDD}
 C {devices/vsource.sym} 640 -350 0 0 {name=VSTART value="0 pwl(0 0 500n 0 500.1n 1.8)"}
 C {devices/gnd.sym} 640 -310 0 0 {name=l10 lab=GND}
 C {devices/spice_probe.sym} 640 -420 0 0 {name=p1 attrs=""}
-C {devices/vsource.sym} 840 -340 0 0 {name=VSTOP value="0 pwl(0 0 100n 1.8 200n 1.8 200.1n 0 508n 0 508.1n 1.8)"}
+C {devices/vsource.sym} 840 -340 0 0 {name=VSTOP value="0 pwl(0 0 100n 1.8 200n 1.8 200.1n 0 540n 0 540.1n 1.8)"}
 C {devices/gnd.sym} 840 -300 0 0 {name=l13 lab=GND}
 C {devices/spice_probe.sym} 840 -400 0 0 {name=p2 attrs=""}
 C {devices/lab_wire.sym} 900 -400 0 1 {name=l14 sig_type=std_logic lab=stop}

diff --git a/sim/tb_tt06_tdc.spice b/sim/tb_tt06_tdc.spice
@@ -2,7 +2,7 @@
 **.subckt tb_tt06_tdc
 VSTART start GND 0 pwl(0 0 500n 0 500.1n 1.8)
 .save v(start)
-VSTOP stop GND 0 pwl(0 0 100n 1.8 200n 1.8 200.1n 0 508n 0 508.1n 1.8)
+VSTOP stop GND 0 pwl(0 0 100n 1.8 200n 1.8 200.1n 0 540n 0 540.1n 1.8)
 .save v(stop)
 Cload1[15] res_ring[15] GND 10f m=1
 Cload1[14] res_ring[14] GND 10f m=1
@@ -47,7 +47,7 @@ Cload2[0] res_ctr[0] GND 10f m=1
 x1 dbg_stop dbg_dly[0] dbg_dly[11] dbg_dly[13] dbg_dly[2] dbg_dly[4] dbg_dly[5] dbg_dly[6] dbg_dly[7] dbg_dly[8] dbg_dly[9]
 + dbg_ctr[0] dbg_ctr[1] dbg_ctr[2] start stop res_ctr[0] res_ctr[2] res_ring[0] res_ring[10] res_ring[12] res_ring[13] res_ring[14]
 + res_ring[15] res_ring[2] res_ring[5] res_ring[8] res_ring[7] res_ring[4] res_ring[1] dbg_dly[10] dbg_dly[15] res_ring[9] res_ring[6]
-+ res_ring[11] res_ctr[1] res_ring[3] dbg_dly[12] dbg_dly[14] dbg_dly[1] dbg_dly[3] dbg_start VDD GND tdc_ring
++ res_ring[11] res_ctr[1] res_ring[3] dbg_dly[12] dbg_dly[14] dbg_dly[1] dbg_dly[3] dbg_start GND VDD tdc_ring
 Cload3[2] dbg_ctr[2] GND 0.1f m=1
 Cload3[1] dbg_ctr[1] GND 0.1f m=1
 Cload3[0] dbg_ctr[0] GND 0.1f m=1