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Revert "Rename to tdc_v1"
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This reverts commit d6d0274.
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hpretl committed Mar 17, 2024
1 parent d6d0274 commit 5296c1f
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2 changes: 1 addition & 1 deletion docs/info.md
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Expand Up @@ -11,7 +11,7 @@ You can also include images in this folder and reference them in the markdown. E

This is a simple synthesized time-to-digital converter (TDC), consisting of a delay line and parallel capture FF. Depending on `__TDC_INTERLEAVED__` either a simple or an interleaved delay line is implemented.

In the TT 1x1 block size a 192-stage interleaved delay can be fitted.
In the TT 1x1 block size a 128-stage interleaved delay can be fitted.

## How to test

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6 changes: 3 additions & 3 deletions info.yaml
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# Tiny Tapeout project information
project:
title: "Synthesized Time-to-Digital Converter (TDC) v1"
title: "Synthesized Time-to-Digital Converter (TDC)"
author: "Harald Pretl"
discord: "hpretl"
description: "Synthesized TDC based on an interleaved delay line"
Expand All @@ -11,11 +11,11 @@ project:
tiles: "1x1" # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2

# Your top module name must start with "tt_um_". Make it unique by including your github username:
top_module: "tt_um_hpretl_tt06_tdc_v1"
top_module: "tt_um_hpretl_tt06_tdc"

# List your project's source files here. Source files must be in ./src and you must list each source file separately, one per line:
source_files:
- "tt_um_hpretl_tt06_tdc_v1.v"
- "tt_um_hpretl_tt06_tdc.v"
- "tdc.v"

# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
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2 changes: 1 addition & 1 deletion sim/build.sh
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# Copyright (c) 2024 Harald Pretl, IIC@JKU
# SPDX-License-Identifier: Apache-2.0

MODULE=tt_um_hpretl_tt06_tdc_v1
MODULE=tt_um_hpretl_tt06_tdc
#MODULE=tdc

[ -f $MODULE.mag ] && rm $MODULE.mag
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