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ARM64: Fix LCodeGen::ToOperand32.
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This fixes the following generated code sequence:
  movn w1, #0     // Synthesize -1.
  cmp w0, w1

With a properly-constructed Operand, the MacroAssembler can optimize it
as follows:
  cmn w0, #1

BUG=
R=ulan@chromium.org

Review URL: https://codereview.chromium.org/253513003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@20989 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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Jacob.Bramley@arm.com authored and Jacob.Bramley@arm.com committed Apr 25, 2014
1 parent baff916 commit f2cde15
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions src/arm64/lithium-codegen-arm64.cc
Original file line number Diff line number Diff line change
Expand Up @@ -1235,9 +1235,9 @@ Operand LCodeGen::ToOperand32(LOperand* op, IntegerSignedness signedness) {
Representation r = chunk_->LookupLiteralRepresentation(const_op);
if (r.IsInteger32()) {
ASSERT(constant->HasInteger32Value());
return Operand(signedness == SIGNED_INT32
? constant->Integer32Value()
: static_cast<uint32_t>(constant->Integer32Value()));
return (signedness == SIGNED_INT32)
? Operand(constant->Integer32Value())
: Operand(static_cast<uint32_t>(constant->Integer32Value()));
} else {
// Other constants not implemented.
Abort(kToOperand32UnsupportedImmediate);
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