-
Notifications
You must be signed in to change notification settings - Fork 7
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
psu-ng: Modified logic to handle MFR warning #26
Open
faisal-awada
wants to merge
1
commit into
ibm-openbmc:1060
Choose a base branch
from
faisal-awada:12V_MFR
base: 1060
Could not load branches
Branch not found: {{ refName }}
Loading
Could not load tags
Nothing to show
Loading
Are you sure you want to change the base?
Some commits from the old base branch may be removed from the timeline,
and old review comments may become outdated.
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
spinler
reviewed
Oct 1, 2024
spinler
approved these changes
Oct 2, 2024
derekhoward55
approved these changes
Oct 2, 2024
smccarney
reviewed
Oct 7, 2024
Modified the logic to handle bit 7 (0x80) in MFR fault. The change include: - If MFR specific bit 7 (0x80) is set, log journal message instead of an error. This journal message logged only once during power-on. - Reset 12V current share warning (bit 7) and leave the existing logic in place to check for other bits. Test: - On the simulator, set MFR specific word to 0x80 and set the status word to 0x1000. Verified the system logged journal message with no PELs generated. - On the simulator, set MFR Specific to 0xC0 and status word to 0x1000. Verified journal message "12V current share warning" was logged, and a PEL was reported with SRC "110015F1" Change-Id: Iacf02695c2b35e8e054111217dae74653cacdca8 Signed-off-by: Faisal Awada <faisal@us.ibm.com>
derekhoward55
approved these changes
Oct 9, 2024
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Looks good for these scenarios: IBMCFF psu cs fault, IBMCFF psu other mfr fault, IBMCFF psu cs AND other mfr fault, Bonnell (no mfr setting in status_word), and random non-IBMCFF psu.
smccarney
approved these changes
Oct 9, 2024
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Modified the logic to handle bit 7 (0x80) in MFR fault. The change include:
Test:
Change-Id: Iacf02695c2b35e8e054111217dae74653cacdca8