Currently studying Electrical and Computer Engineering at the Technical University of Chania ,Crete.
Machine Learning Enthousiast
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TUC
- Chania
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Logic-Gates-Designs
Logic-Gates-Designs Public4th Semester Προχωρημένη Λογική Σχεδίαση. Δημιουργία Μηχανής FSM με Adder
VHDL
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1-Cycle-Prosceccor
1-Cycle-Prosceccor Public6ο Εξάμηνο δημιουργία επεξεργαστή ενός κύκλου με γλώσσα VHDL στο πρόγραμμα Xilinx
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