Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add avxifma feature detection on x86 #352

Open
wants to merge 3 commits into
base: main
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 3 additions & 0 deletions include/cpuinfo_x86.h
Original file line number Diff line number Diff line change
Expand Up @@ -62,6 +62,7 @@ typedef struct {
int avx : 1;
int avx_vnni : 1;
int avx2 : 1;
int avxifma : 1;

int avx512f : 1;
int avx512cd : 1;
Expand Down Expand Up @@ -165,6 +166,7 @@ typedef enum {
INTEL_ADL, // ALDER LAKE
INTEL_RCL, // ROCKET LAKE
INTEL_RPL, // RAPTOR LAKE
INTEL_SRF, // SIERRA FOREST
INTEL_KNIGHTS_M, // KNIGHTS MILL
INTEL_KNIGHTS_L, // KNIGHTS LANDING
INTEL_KNIGHTS_F, // KNIGHTS FERRY
Expand Down Expand Up @@ -232,6 +234,7 @@ typedef enum {
X86_AVX,
X86_AVX_VNNI,
X86_AVX2,
X86_AVXIFMA,
X86_AVX512F,
X86_AVX512CD,
X86_AVX512ER,
Expand Down
6 changes: 6 additions & 0 deletions src/impl_x86__base_implementation.inl
Original file line number Diff line number Diff line change
Expand Up @@ -423,6 +423,7 @@ static void ParseCpuId(const Leaves* leaves, X86Info* info,
features->avx = IsBitSet(leaf_1.ecx, 28);
features->avx_vnni = IsBitSet(leaf_7_1.eax, 4);
features->avx2 = IsBitSet(leaf_7.ebx, 5);
features->avxifma = IsBitSet(leaf_7_1.eax, 23);
}
if (os_preserves->avx512_registers) {
features->avx512f = IsBitSet(leaf_7.ebx, 16);
Expand Down Expand Up @@ -682,6 +683,9 @@ X86Microarchitecture GetX86Microarchitecture(const X86Info* info) {
case CPUID(0x0F, 0x06):
// https://en.wikichip.org/wiki/intel/microarchitectures/netburst
return INTEL_NETBURST;
case CPUID(0x06, 0xAF):
// SierraForest
return INTEL_SRF;
default:
return X86_UNKNOWN;
}
Expand Down Expand Up @@ -1954,6 +1958,7 @@ CacheInfo GetX86CacheInfo(void) {
LINE(X86_AVX, avx, , , ) \
LINE(X86_AVX_VNNI, avx_vnni, , , ) \
LINE(X86_AVX2, avx2, , , ) \
LINE(X86_AVXIFMA, avxifma, , , ) \
LINE(X86_AVX512F, avx512f, , , ) \
LINE(X86_AVX512CD, avx512cd, , , ) \
LINE(X86_AVX512ER, avx512er, , , ) \
Expand Down Expand Up @@ -2038,6 +2043,7 @@ CacheInfo GetX86CacheInfo(void) {
LINE(INTEL_ADL) \
LINE(INTEL_RCL) \
LINE(INTEL_RPL) \
LINE(INTEL_SRF) \
LINE(INTEL_KNIGHTS_M) \
LINE(INTEL_KNIGHTS_L) \
LINE(INTEL_KNIGHTS_F) \
Expand Down
21 changes: 21 additions & 0 deletions test/cpuinfo_x86_test.cc
Original file line number Diff line number Diff line change
Expand Up @@ -1750,6 +1750,27 @@ TEST_F(CpuidX86Test, INTEL_ALDER_LAKE_N) {
EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_ADL);
}

// SierraForest
TEST_F(CpuidX86Test, INTEL_SIERRA_FOREST) {
cpu().SetOsBackupsExtendedRegisters(true);
cpu().SetLeaves({
{{0x00000000, 0}, Leaf{0x00000023, 0x756E6547, 0x6C65746E, 0x49656E69}},
{{0x00000001, 0}, Leaf{0x000A06F3, 0x66FF0800, 0x7FFEFBFF, 0xBFEBFBFF}},
// 0x00000007 0x00: eax=0x00000002 ebx=0x239cb7ef ecx=0xfb4027bc edx=0xfc1c4432
// 0x00000007 0x01: eax=0x4c8809d0 ebx=0x00000001 ecx=0x00000000 edx=0x00060030
{{0x00000007, 0}, Leaf{0x00000002, 0x239CB7EF, 0xFB4027BC, 0xFC1C4432}},
{{0x00000007, 1}, Leaf{0x4C8809D0, 0x00000001, 0x00000000, 0x00060030}},
});
const auto info = GetX86Info();

EXPECT_STREQ(info.vendor, CPU_FEATURES_VENDOR_GENUINE_INTEL);
EXPECT_EQ(info.family, 0x06);
EXPECT_EQ(info.model, 0xAF);
EXPECT_TRUE(info.features.avxifma);
EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_SRF);
}


// https://github.com/google/cpu_features/issues/200
// http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00206F2_Eagleton_CPUID.txt
#if defined(CPU_FEATURES_OS_WINDOWS)
Expand Down