Natalius is a compact, capable, and fully embedded 8-bit RISC processor core described 100% in Verilog. This processor includes a very tiny VGA Controller suitable for video games. The instruction memory is implemented in two BlockRAM Memories, storing 2048 instructions, each with a width of 16 bits. Each instruction takes 3 clock cycles to execute.
- 8-bit ALU
- 8x8 Register File
- 2048x16 Instruction Memory
- 32x8 RAM Memory
- 16x11 Stack Memory
- Three CLK/Instruction
- Carry and Zero flags
- No Operation Instruction (nop)
- 8-bit Address Port (up to 256 Peripherals)
- Memory Access Instructions: LDI, LDM, STM
- Arithmetic Instructions: CMP, ADD, ADI, SUB
- Logical Instructions: AND, OR, XOR, NOP, SL0, SL1, SR0, SR1, RRL, RRR
- Flow Control Instructions: JMP, JPZ, JNZ, JPC, JNC, CSR, RET, CSZ, CNZ, CSC, CNC
This project uses the SkyWater SKY130 open-source PDK for silicon fabrication. The SKY130 process is a 130nm technology node that provides a full open-source PDK and related resources for chip design and manufacturing. For more information, visit the SkyWater Technology website.
- Verilog compiler
- FPGA development environment (e.g., Xilinx Vivado)
- Access to SkyWater SKY130 PDK
Clone the repository:
git clone https://github.com/fguzman82/upb_natalius_soc.git
cd upb_natalius_soc