adc: fix adc dma interrupt stops under heavy load (IDFGH-10863) #12065
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The adc rx dma eof interrupt will stop generating after all rx eof descriptor is owered by DMA engine. This may happen under heavy load (eg. wifi initialization). Fix this by disabling owner check of descriptor in the DMA engine side, and CPU determines valid eof descriptor by polling the owner bit.
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Thanks for your contribution. |
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Any reason why this was closed? Looks like it resolve same bug in my case too. |
A PR with similar changes have been accepted before. You may upgrade to use a newer version. |
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The adc rx dma eof interrupt will stop generating after all rx eof descriptor is owered by DMA engine. This may happen under heavy load (eg. wifi initialization), and eof_desc_addr should not be used to check the current eof descriptor anymore (for there maybe long delays during adc_dma_intr_handler execution).
Fix this by disabling owner check of descriptor in the DMA engine side, and CPU determines valid eof descriptor by polling the owner bit.
closing #12053