Add more SPI DMA HIL tests (blocking and async)

hil-test/Cargo.toml

@@ -72,6 +72,10 @@ harness = false
 name    = "spi_full_duplex_dma"
 harness = false
 
+[[test]]
+name    = "spi_full_duplex_dma_async"
+harness = false
+
 [[test]]
 name    = "spi_half_duplex_read"
 harness = false

hil-test/tests/spi_full_duplex_dma.rs

@@ -6,6 +6,10 @@
 //! MOSI    GPIO3
 //! CS      GPIO8
 //!
+//! Only for test_dma_read_dma_write and test_dma_read_dma_transfer tests:
+//! PCNT    GPIO2
+//! OUTPUT  GPIO5 (helper to keep MISO HIGH)
+//!
 //! Connect MISO (GPIO2) and MOSI (GPIO3) pins.
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s3
@@ -318,4 +322,191 @@ mod tests {
         let (_, send, receive) = transfer.wait().unwrap();
         assert_eq!(send, receive);
     }
+
+    #[test]
+    #[timeout(3)]
+    #[cfg(any(
+        feature = "esp32",
+        feature = "esp32c6",
+        feature = "esp32h2",
+        feature = "esp32s3"
+    ))]
+    fn test_dma_read_dma_write() {
+        use esp_hal::{
+            gpio::{Level, Output, Pull},
+            pcnt::{
+                channel::{EdgeMode, PcntInputConfig, PcntSource},
+                Pcnt,
+            },
+        };
+
+        const DMA_BUFFER_SIZE: usize = 5;
+
+        let peripherals = Peripherals::take();
+        let system = SystemControl::new(peripherals.SYSTEM);
+        let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
+
+        let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
+        let pcnt = Pcnt::new(peripherals.PCNT);
+        let sclk = io.pins.gpio0;
+        let mosi_mirror = io.pins.gpio2;
+        let mosi = io.pins.gpio3;
+        let miso = io.pins.gpio6;
+        let cs = io.pins.gpio8;
+
+        let mut out_pin = Output::new(io.pins.gpio5, Level::High);
+        out_pin.set_low();
+        assert_eq!(out_pin.is_set_low(), true);
+
+        let dma = Dma::new(peripherals.DMA);
+
+        #[cfg(any(feature = "esp32", feature = "esp32s2"))]
+        let dma_channel = dma.spi2channel;
+        #[cfg(not(any(feature = "esp32", feature = "esp32s2")))]
+        let dma_channel = dma.channel0;
+
+        let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
+
+        let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0, &clocks)
+            .with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
+            .with_dma(
+                dma_channel.configure(false, DmaPriority::Priority0),
+                tx_descriptors,
+                rx_descriptors,
+            );
+
+        let unit = pcnt.unit0;
+        unit.channel0.set_edge_signal(PcntSource::from_pin(
+            mosi_mirror,
+            PcntInputConfig { pull: Pull::Down },
+        ));
+        unit.channel0
+            .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
+
+        // DMA buffer require a static life-time
+        let mut receive = rx_buffer;
+
+        tx_buffer.fill(0b0110_1010);
+
+        assert_eq!(out_pin.is_set_low(), true);
+
+        // 1
+        receive.copy_from_slice(&[5, 5, 5, 5, 5]);
+        let transfer = spi.dma_read(&mut receive).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(receive, &[0, 0, 0, 0, 0]);
+
+        let transfer = spi.dma_write(&tx_buffer).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(unit.get_value(), (3 * DMA_BUFFER_SIZE) as _);
+
+        // 2
+        receive.copy_from_slice(&[5, 5, 5, 5, 5]);
+        let transfer = spi.dma_read(&mut receive).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(receive, &[0, 0, 0, 0, 0]);
+
+        let transfer = spi.dma_write(&tx_buffer).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(unit.get_value(), (6 * DMA_BUFFER_SIZE) as _);
+    }
+
+    #[test]
+    #[timeout(3)]
+    #[cfg(any(
+        feature = "esp32",
+        feature = "esp32c6",
+        feature = "esp32h2",
+        feature = "esp32s3"
+    ))]
+    fn test_dma_read_dma_transfer() {
+        use esp_hal::{
+            gpio::{Level, Output, Pull},
+            pcnt::{
+                channel::{EdgeMode, PcntInputConfig, PcntSource},
+                Pcnt,
+            },
+        };
+
+        const DMA_BUFFER_SIZE: usize = 5;
+
+        let peripherals = Peripherals::take();
+        let system = SystemControl::new(peripherals.SYSTEM);
+        let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
+
+        let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
+        let pcnt = Pcnt::new(peripherals.PCNT);
+        let sclk = io.pins.gpio0;
+        let mosi_mirror = io.pins.gpio2;
+        let mosi = io.pins.gpio3;
+        let miso = io.pins.gpio6;
+        let cs = io.pins.gpio8;
+
+        let mut out_pin = Output::new(io.pins.gpio5, Level::High);
+        out_pin.set_low();
+        assert_eq!(out_pin.is_set_low(), true);
+
+        let dma = Dma::new(peripherals.DMA);
+
+        #[cfg(any(feature = "esp32", feature = "esp32s2"))]
+        let dma_channel = dma.spi2channel;
+        #[cfg(not(any(feature = "esp32", feature = "esp32s2")))]
+        let dma_channel = dma.channel0;
+
+        let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE);
+
+        let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0, &clocks)
+            .with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
+            .with_dma(
+                dma_channel.configure(false, DmaPriority::Priority0),
+                tx_descriptors,
+                rx_descriptors,
+            );
+
+        let unit = pcnt.unit0;
+        unit.channel0.set_edge_signal(PcntSource::from_pin(
+            mosi_mirror,
+            PcntInputConfig { pull: Pull::Down },
+        ));
+        unit.channel0
+            .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
+
+        // DMA buffer require a static life-time
+        let mut receive = rx_buffer;
+
+        // Fill the buffer where each byte 3 pos edges.
+        tx_buffer.fill(0b0110_1010);
+
+        assert_eq!(out_pin.is_set_low(), true);
+
+        // 1
+        receive.copy_from_slice(&[5, 5, 5, 5, 5]);
+        let transfer = spi.dma_read(&mut receive).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(receive, &[0, 0, 0, 0, 0]);
+
+        let transfer = spi.dma_transfer(&tx_buffer, &mut receive).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(unit.get_value(), (3 * DMA_BUFFER_SIZE) as _);
+
+        // 2
+        receive.copy_from_slice(&[5, 5, 5, 5, 5]);
+        let transfer = spi.dma_read(&mut receive).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(receive, &[0, 0, 0, 0, 0]);
+
+        let transfer = spi.dma_transfer(&tx_buffer, &mut receive).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(unit.get_value(), (6 * DMA_BUFFER_SIZE) as _);
+
+        // 3
+        receive.copy_from_slice(&[5, 5, 5, 5, 5]);
+        let transfer = spi.dma_read(&mut receive).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(receive, &[0, 0, 0, 0, 0]);
+
+        let transfer = spi.dma_transfer(&tx_buffer, &mut receive).unwrap();
+        transfer.wait().unwrap();
+        assert_eq!(unit.get_value(), (9 * DMA_BUFFER_SIZE) as _);
+    }
 }