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Beaglev misc fixes #30

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Beaglev misc fixes #30

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065c8e2
squash! riscv: dts: Add JH7100 and BeagleV Starlight support
geertu Jul 6, 2021
83a4ab2
squash! dt-bindings: gpio: add starfive,jh7100-gpio bindings
geertu Jul 8, 2021
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/gpio/starfive,jh7100-gpio.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,7 @@ examples:
gpio@11910000 {
compatible = "starfive,jh7100-gpio";
reg = <0x11910000 0x10000>;
clocks = <&clkgen CLK_GPIO_APB>
clocks = <&clkgen JH7100_CLK_GPIO_APB>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
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8 changes: 4 additions & 4 deletions arch/riscv/boot/dts/starfive/jh7100.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -277,7 +277,7 @@
interrupts = <96>;
clocks = <&clkgen JH7100_CLK_I2C0_CORE>,
<&clkgen JH7100_CLK_I2C0_APB>;
clock-names = "core", "pclk";
clock-names = "ref", "pclk";
status = "disabled";
};

Expand All @@ -289,7 +289,7 @@
interrupts = <97>;
clocks = <&clkgen JH7100_CLK_I2C1_CORE>,
<&clkgen JH7100_CLK_I2C1_APB>;
clock-names = "core", "pclk";
clock-names = "ref", "pclk";
status = "disabled";
};

Expand All @@ -301,7 +301,7 @@
interrupts = <74>;
clocks = <&clkgen JH7100_CLK_I2C2_CORE>,
<&clkgen JH7100_CLK_I2C2_APB>;
clock-names = "core", "pclk";
clock-names = "ref", "pclk";
status = "disabled";
};

Expand All @@ -313,7 +313,7 @@
interrupts = <75>;
clocks = <&clkgen JH7100_CLK_I2C3_CORE>,
<&clkgen JH7100_CLK_I2C3_APB>;
clock-names = "core", "pclk";
clock-names = "ref", "pclk";
status = "disabled";
};

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