esmil · pdp7 · Apr 30, 2021 · Apr 30, 2021 · Apr 30, 2021 · Apr 30, 2021
diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7100-clkgen.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7100-clkgen.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/starfive,jh7100-clkgen.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7100 Clock Generator
+
+maintainers:
+  - FIXME <someone@starfivetech.com>
+  - Geert Uytterhoeven <geert@linux-m68k.org>
+
+properties:
+  compatible:
+    const: starfive,jh7100-clkgen
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Main clock source (default 25 MHz)
+      - description: Application-specific clock source (12-27 MHz)
+
+  clock-names:
+    items:
+      - const: osc0
+      - const: osc1
+
+  '#clock-cells':
+    const: 1
+    description:
+      See <dt-bindings/clock/starfive-jh7100-clkgen.h> for valid indices.
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    clkgen: clock-controller@11800000 {
+            compatible = "starfive,jh7100-clkgen";
+            reg = <0x11800000 0x10000>;
+            clocks = <&osc0_clk>, <&osc1_clk>;
+            clock-names = "osc0", "osc1";
+            #clock-cells = <1>;
+    };
diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
@@ -51,7 +51,7 @@ properties:
 
   dma-channels:
     minimum: 1
-    maximum: 8
+    maximum: 16
 
   snps,dma-masters:
     description: |
@@ -71,14 +71,14 @@ properties:
       Channel priority specifier associated with the DMA channels.
     $ref: /schemas/types.yaml#/definitions/uint32-array
     minItems: 1
-    maxItems: 8
+    maxItems: 16
 
   snps,block-size:
     description: |
       Channel block size specifier associated with the DMA channels.
     $ref: /schemas/types.yaml#/definitions/uint32-array
     minItems: 1
-    maxItems: 8
+    maxItems: 16
 
   snps,axi-max-burst-len:
     description: |

diff --git a/Documentation/devicetree/bindings/gpio/starfive,jh7100-gpio.yaml b/Documentation/devicetree/bindings/gpio/starfive,jh7100-gpio.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/starfive,jh7100-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7100 GPIO controller
+
+maintainers:
+  - Huan Feng <huan.feng@starfivetech.com>
+  - Drew Fustini <drew@beagleboard.org>
+
+properties:
+  compatible:
+    items:
+      - const: starfive,jh7100-gpio
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    description:
+      Interrupt mapping, one per GPIO. Maximum 32 GPIOs.
+    minItems: 1
+    maxItems: 32
+
+  gpio-controller: true
+
+  "#gpio-cells":
+    const: 2
+
+  interrupt-controller: true
+
+  "#interrupt-cells":
+    const: 2
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-controller
+  - "#interrupt-cells"
+  - "#gpio-cells"
+  - gpio-controller
+
+additionalProperties: false
+
+examples:
+  - |
+      gpio@11910000 {
+        compatible = "starfive,jh7100-gpio";
+        reg = <0x11910000 0x10000>;
+        gpio-controller;
+        #gpio-cells = <2>;
+        interrupt-controller;
+        #interrupt-cells = <2>;
+        interrupts = <32>;
+      };
+
+...
diff --git a/Documentation/devicetree/bindings/hwmon/starfive,jh7100-temp.yaml b/Documentation/devicetree/bindings/hwmon/starfive,jh7100-temp.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/starfive,jh7100-temp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7100 Temperature Sensor
+
+maintainers:
+  - Emil Renner Berthing <kernel@esmil.dk>
+
+description: |
+  StarFive Technology Co. JH7100 embedded temperature sensor
+
+properties:
+  compatible:
+    enum:
+      - starfive,jh7100-temp
+
+  reg:
+    maxItems: 1
+
+  '#thermal-sensor-cells':
+    const: 0
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    tmon: tmon@124a0000 {
+        compatible = "starfive,jh7100-temp";
+        reg = <0x124a0000 0x10000>;
+        #thermal-sensor-cells = <0>;
+        interrupts = <122>;
+    };
diff --git a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml
@@ -28,9 +28,9 @@ properties:
   interrupts:
     minItems: 3
     items:
-      - description: OTG/DRD controller interrupt
       - description: XHCI host controller interrupt
       - description: Device controller interrupt
+      - description: OTG/DRD controller interrupt
       - description: interrupt used to wake up core, e.g when usbcmd.rs is
                      cleared by xhci core, this interrupt is optional
 

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1085,6 +1085,8 @@ patternProperties:
       (formerly part of MStar Semiconductor, Inc.)
   "^st,.*":
     description: STMicroelectronics
+  "^starfive,.*":
+    description: StarFive Technology Co. Ltd.
   "^starry,.*":
     description: Starry Electronic Technology (ShenZhen) Co., LTD
   "^startek,.*":

diff --git a/README.md b/README.md
@@ -0,0 +1,133 @@
+# Linux kernel for the BeagleV Starlight
+
+## What is this?
+
+The [BeagleV Starlight][bborg] board is a new Linux-capable 64bit RISC-V
+development board. It has not shipped yet, but [beta versions][beta] are out to
+developers. Consequently the board is not yet supported by upstream Linux. This
+tree is meant to collect all the in-development patches for running Linux on
+the board.
+
+[bborg]: https://beagleboard.org/beaglev
+[beta]: https://github.com/beagleboard/beaglev-starlight
+
+## Cross-compiling
+
+Cross-compiling the Linux kernel is surprisingly easy since it doesn't depend
+on any (target) libraries and most distributions already have packages with a
+working cross-compiler. We'll also need a few other tools to build everything:
+```shell
+# Debian/Ubuntu
+sudo apt-get install libncurses-dev libssl-dev bc flex bison make gcc gcc-riscv64-linux-gnu
+# Fedora
+sudo dnf install ncurses-devel openssl openssl-devel bc flex bison make gcc gcc-riscv64-linux-gnu
+# Archlinux
+sudo pacman -S --needed ncurses openssl bc flex bison make gcc riscv64-linux-gnu-gcc
+```
+
+The build system needs to know that we want to cross-compile a kernel for
+RISC-V by setting `ARCH=riscv`. It also needs to know the prefix of our
+cross-compiler using `CROSS_COMPILE=riscv64-linux-gnu-`. Also let's assume
+we're building on an 8-core machine so compilation can be greatly sped up by
+telling make to use all 8 cores with `-j8`.
+
+First we need to configure the kernel though. Linux has a *very* extensive
+configuration system, but you can get a good baseline configuration for the
+board using:
+```shell
+make -j8 ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- beaglev_starlight_defconfig
+```
+
+There is nothing magic about this configuration other than it has all the
+drivers enabled that are working for the hardware on the board. In fact it has
+very little extra features enabled which is great for compile times, but you
+are very much encouraged to add additional drivers and configure your kernel
+further using
+```shell
+make -j8 ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- nconfig
+```
+
+Now compile the whole thing with
+```
+make -j8 ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu-
+```
+
+
+## Installing
+
+Once the build has finished the resulting kernel can be found at
+```shell
+arch/riscv/boot/Image
+```
+You'll also need the matching device tree at
+```shell
+arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dtb
+```
+These two files should be copied to the boot partition on the SD card. That is
+onto the same file system that contains the `extlinux/extlinux.conf`. On the
+default Fedora image this is mounted at `/boot`.
+
+Now add the following entry to the `extlinux/extlinux.conf` file:
+```
+label My New Kernel
+kernel /Image
+fdt /jh7100-beaglev-starlight.dtb
+append earlycon console=ttyS0,115200n8 root=/dev/mmcblk0p2 rootwait stmmac.chain_mode=1
+```
+
+This assumes your root file system is at `/dev/mmcblk0p2` which it is on the
+default Fedora image. Also if your kernel is very big it might be beneficial to
+use the compressed `Image.gz` rather than the uncompressed `Image`.
+
+The `beaglev_starlight_defconfig` doesn't enable modules, but if you enabled them in
+your build you'll also need to install them in `/lib/modules/` on the root file
+system. How to do that best is out of scope for this README though.
+
+
+## Status
+
+#### SoC
+
+- [x] GPIO
+- [x] Serial port
+- [x] I2C
+- [x] SPI
+- [x] MMC / SDIO / SD card
+- [x] Random number generator
+- [x] Temperature sensor
+- [x] Ethernet, though a little flaky and `stmmac.chain_mode=1` needed on the cmdline
+- [x] Framebuffer, fbdev driver so not upstreamable
+- [ ] Clock tree, statically set up by u-boot, WIP clock driver
+- [ ] Pinctrl/Pinmux, statically set up by u-boot
+- [ ] Watchdog
+- [ ] USB, USB 2.0 seems to work ok, but USB 3.0 is very flaky / broken
+- [ ] Security Engine
+- [ ] MIPI-DSI
+- [ ] ISP
+- [ ] MIPI-CSI
+- [ ] Video Decode
+- [ ] Video Encode
+- [ ] NVDLA
+- [ ] NNE50
+- [ ] Vision DSP
+
+#### Board
+
+- [x] LED
+- [x] PMIC / Reboot
+- [x] Ethernet PHY
+- [x] HDMI, working with [some screens][hdmi]
+- [x] AP6236 Wifi
+- [ ] AP6236 Bluetooth
+- [ ] GD25LQ256D SPI flash
+
+[hdmi]: https://forum.beagleboard.org/t/hdmi-displays-compatible-list/
+
+## Contributing
+
+If you're working on cleaning up or upstreaming some of this or adding support
+for more of the SoC I'd very much like to incorporate it into this tree. Either
+send a pull request, mail or contact Esmil on IRC/Slack.
+
+Also I think of this tree mostly as a collection of patches that will hopefully
+mature enough to be submitted upstream. So expect regular rebases.
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
@@ -83,6 +83,8 @@ config RISCV
 	select HAVE_KPROBES
 	select HAVE_KPROBES_ON_FTRACE
 	select HAVE_KRETPROBES
+	select HAVE_MOVE_PMD
+	select HAVE_MOVE_PUD
 	select HAVE_PCI
 	select HAVE_PERF_EVENTS
 	select HAVE_PERF_REGS
@@ -104,6 +106,7 @@ config RISCV
 	select SYSCTL_EXCEPTION_TRACE
 	select THREAD_INFO_IN_TASK
 	select UACCESS_MEMCPY if !MMU
+	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU
 
 config ARCH_MMAP_RND_BITS_MIN
 	default 18 if 64BIT