Add padrick to generate padframe

.gitignore

@@ -13,7 +13,6 @@ core-v-mini-mcu.upf
 tb/tb_util.svh
 hw/core-v-mini-mcu/include/core_v_mini_mcu_pkg.sv
 hw/core-v-mini-mcu/system_bus.sv
-hw/system/x_heep_system.sv
 hw/system/pad_ring.sv
 tb/tb_util.svh
 hw/ip/power_manager/data/power_manager.hjson

Makefile

@@ -14,9 +14,7 @@ mcu-gen:
 	python util/mcu_gen.py --cfg mcu_cfg.hjson --outdir hw/core-v-mini-mcu/include --cpu $(CPU) --bus $(BUS) --memorybanks $(MEMORY_BANKS) --external_domains $(EXTERNAL_DOMAINS) --pkg-sv hw/core-v-mini-mcu/include/core_v_mini_mcu_pkg.sv.tpl
 	python util/mcu_gen.py --cfg mcu_cfg.hjson --outdir hw/core-v-mini-mcu/ --memorybanks $(MEMORY_BANKS) --tpl-sv hw/core-v-mini-mcu/system_bus.sv.tpl
 	python util/mcu_gen.py --cfg mcu_cfg.hjson --outdir tb/ --memorybanks $(MEMORY_BANKS) --tpl-sv tb/tb_util.svh.tpl
-	python util/mcu_gen.py --cfg mcu_cfg.hjson --outdir hw/system/ --tpl-sv hw/system/pad_ring.sv.tpl
 	python util/mcu_gen.py --cfg mcu_cfg.hjson --outdir hw/core-v-mini-mcu/ --tpl-sv hw/core-v-mini-mcu/core_v_mini_mcu.sv.tpl
-	python util/mcu_gen.py --cfg mcu_cfg.hjson --outdir hw/system/ --tpl-sv hw/system/x_heep_system.sv.tpl
 	python util/mcu_gen.py --cfg mcu_cfg.hjson --outdir sw/device/lib/runtime --cpu $(CPU) --memorybanks $(MEMORY_BANKS) --header-c sw/device/lib/runtime/core_v_mini_mcu.h.tpl
 	python util/mcu_gen.py --cfg mcu_cfg.hjson --outdir sw/linker --memorybanks $(MEMORY_BANKS) --linker_script sw/linker/link.ld.tpl
 	python util/mcu_gen.py --cfg mcu_cfg.hjson --outdir . --memorybanks $(MEMORY_BANKS) --pkg-sv ./core-v-mini-mcu.upf.tpl

README.md

@@ -115,6 +115,41 @@ If you want to see the vcd waveforms generated by the Verilator simulation, inst
 sudo apt install libcanberra-gtk-module libcanberra-gtk3-module
 sudo apt-get install -y gtkwave
 ```
+## Generate padframe
+
+First, to generate the padframe, you should have padrick, you can install the padrick by:
+
+```
+curl https://api.github.com/repos/pulp-platform/padrick/releases/latest \
+    | grep "Padrick-x86_64.AppImage" \
+    | cut -d : -f 2,3 \
+    | tr -d \" \
+    | wget -qi -
+mv Padrick-x86_64.AppImage padrick
+chmod a+x padrick
+```
+
+Then, go to the hw/system/padframe folder, here you can see a padframe.yml file, in which you can modify the configurations of the padframe, after that, you can generate the padframe by:
+
+```
+padrick generate rtl padframe.yml
+```
+
+This command will generate all the files of the new padframe. Now that your padframe IP is generated you can instantiate it within your design. The toplevel module for user instantiation is called <padframe.name>.sv. The structs that make up the interface of this SystemVerilog module are defined in pkg_<padframe.name>.sv.
+
+Correspondingly, you can also generate the driver by:
+
+```
+padrick generate driver -o ../../../sw/device/lib/drivers/padframe/ padframe.yml
+```
+'-o' here defines the output folder.
+
+You can also use the following command to show the built-in helo
+```
+padrick --help
+```
+
+To further know how to intergrate the generated padframe, please refer to https://padrick.readthedocs.io/en/latest/
 
 ## Files are formatted with Verible
 

core-v-mini-mcu.core

@@ -14,6 +14,7 @@ filesets:
     - openhwgroup.org:ip:cv32e40p
     - openhwgroup.org:ip:cve2
     - pulp-platform.org:ip:fpnew
+    - pulp-platform.org:ip:gpio
     - pulp-platform.org::common_cells
     - pulp-platform.org::cluster_interconnect
     - pulp-platform.org::riscv_dbg
@@ -22,7 +23,6 @@ filesets:
     - lowrisc:ip:uart:0.1
     - lowrisc:ip:rv_plic_example:0.1
     - lowrisc:ip:rv_timer:0.1
-    - lowrisc:ip:gpio:0.1
     - lowrisc:ip:spi_host:1.0
     - lowrisc:ip:i2c:0.1
     - yosyshq:picorv32_spimemio:0-r1
@@ -58,10 +58,9 @@ filesets:
   x_heep_system:
     depend:
     - x-heep::packages
-    - x-heep:ip:pad_control
+    - x-heep:ip:padframe
     files:
     - hw/system/x_heep_system.sv
-    - hw/system/pad_ring.sv
     file_type: systemVerilogSource
 
   tb-utils:

hw/core-v-mini-mcu/ao_peripheral_subsystem.sv

@@ -337,8 +337,8 @@ module ao_peripheral_subsystem
       .dma_intr_o
   );
 
-  assign pad_req_o = ao_peripheral_slv_req[core_v_mini_mcu_pkg::PAD_CONTROL_IDX];
-  assign ao_peripheral_slv_rsp[core_v_mini_mcu_pkg::PAD_CONTROL_IDX] = pad_resp_i;
+  assign pad_req_o = ao_peripheral_slv_req[core_v_mini_mcu_pkg::PADFRAME_IDX];
+  assign ao_peripheral_slv_rsp[core_v_mini_mcu_pkg::PADFRAME_IDX] = pad_resp_i;
 
   fast_intr_ctrl #(
       .reg_req_t(reg_pkg::reg_req_t),
@@ -352,32 +352,19 @@ module ao_peripheral_subsystem
       .fast_intr_o
   );
 
-  reg_to_tlul #(
-      .req_t(reg_pkg::reg_req_t),
-      .rsp_t(reg_pkg::reg_rsp_t),
-      .tl_h2d_t(tlul_pkg::tl_h2d_t),
-      .tl_d2h_t(tlul_pkg::tl_d2h_t),
-      .tl_a_user_t(tlul_pkg::tl_a_user_t),
-      .tl_a_op_e(tlul_pkg::tl_a_op_e),
-      .TL_A_USER_DEFAULT(tlul_pkg::TL_A_USER_DEFAULT),
-      .PutFullData(tlul_pkg::PutFullData),
-      .Get(tlul_pkg::Get)
-  ) reg_to_tlul_gpio_ao_i (
-      .tl_o(gpio_tl_h2d),
-      .tl_i(gpio_tl_d2h),
-      .reg_req_i(ao_peripheral_slv_req[core_v_mini_mcu_pkg::GPIO_AO_IDX]),
-      .reg_rsp_o(ao_peripheral_slv_rsp[core_v_mini_mcu_pkg::GPIO_AO_IDX])
-  );
-
-  gpio gpio_ao_i (
+  gpio #(
+      .reg_req_t(reg_pkg::reg_req_t),
+      .reg_rsp_t(reg_pkg::reg_rsp_t)
+  ) gpio_ao_i (
       .clk_i,
       .rst_ni,
-      .tl_i(gpio_tl_h2d),
-      .tl_o(gpio_tl_d2h),
-      .cio_gpio_i({24'b0, cio_gpio_i}),
-      .cio_gpio_o({cio_gpio_unused, cio_gpio_o}),
-      .cio_gpio_en_o({cio_gpio_en_unused, cio_gpio_en_o}),
-      .intr_gpio_o({intr_gpio_unused, intr_gpio_o})
+      .reg_req_i(ao_peripheral_slv_req[core_v_mini_mcu_pkg::GPIO_AO_IDX]),
+      .reg_rsp_o(ao_peripheral_slv_rsp[core_v_mini_mcu_pkg::GPIO_AO_IDX]),
+      .gpio_in({24'b0, cio_gpio_i}),
+      .gpio_out({cio_gpio_unused, cio_gpio_o}),
+      .gpio_tx_en_o({cio_gpio_en_unused, cio_gpio_en_o}),
+      .gpio_in_sync_o(),
+      .interrupt_o({intr_gpio_unused, intr_gpio_o})
   );
 
   reg_to_tlul #(

hw/core-v-mini-mcu/include/core_v_mini_mcu_pkg.sv.tpl

@@ -154,10 +154,10 @@ package core_v_mini_mcu_pkg;
   localparam logic[31:0] EXT_PERIPH_END_ADDRESS = EXT_PERIPH_START_ADDRESS + EXT_PERIPH_SIZE;
   localparam logic[31:0] EXT_PERIPH_IDX = 32'd9;
 
-  localparam logic[31:0] PAD_CONTROL_START_ADDRESS = AO_PERIPHERAL_START_ADDRESS + 32'h${pad_control_start_offset};
-  localparam logic[31:0] PAD_CONTROL_SIZE = 32'h${pad_control_size_address};
-  localparam logic[31:0] PAD_CONTROL_END_ADDRESS = PAD_CONTROL_START_ADDRESS + PAD_CONTROL_SIZE;
-  localparam logic[31:0] PAD_CONTROL_IDX = 32'd10;
+  localparam logic[31:0] PADFRAME_START_ADDRESS = AO_PERIPHERAL_START_ADDRESS + 32'h${padframe_start_offset};
+  localparam logic[31:0] PADFRAME_SIZE = 32'h${padframe_size_address};
+  localparam logic[31:0] PADFRAME_END_ADDRESS = PADFRAME_START_ADDRESS + PADFRAME_SIZE;
+  localparam logic[31:0] PADFRAME_IDX = 32'd10;
 
   localparam logic[31:0] GPIO_AO_START_ADDRESS = AO_PERIPHERAL_START_ADDRESS + 32'h${gpio_ao_start_offset};
   localparam logic[31:0] GPIO_AO_SIZE = 32'h${gpio_ao_size_address};
@@ -180,7 +180,7 @@ package core_v_mini_mcu_pkg;
       '{ idx: DMA_IDX, start_addr: DMA_START_ADDRESS, end_addr: DMA_END_ADDRESS },
       '{ idx: FAST_INTR_CTRL_IDX, start_addr: FAST_INTR_CTRL_START_ADDRESS, end_addr: FAST_INTR_CTRL_END_ADDRESS },
       '{ idx: EXT_PERIPH_IDX, start_addr: EXT_PERIPH_START_ADDRESS, end_addr: EXT_PERIPH_END_ADDRESS },
-      '{ idx: PAD_CONTROL_IDX, start_addr: PAD_CONTROL_START_ADDRESS, end_addr: PAD_CONTROL_END_ADDRESS },
+      '{ idx: PADFRAME_IDX, start_addr: PADFRAME_START_ADDRESS, end_addr: PADFRAME_END_ADDRESS },
       '{ idx: GPIO_AO_IDX, start_addr: GPIO_AO_START_ADDRESS, end_addr: GPIO_AO_END_ADDRESS },
       '{ idx: UART_IDX, start_addr: UART_START_ADDRESS, end_addr: UART_END_ADDRESS }
   };

hw/core-v-mini-mcu/peripheral_subsystem.sv

@@ -225,32 +225,19 @@ module peripheral_subsystem
       .msip_o(msip_o)
   );
 
-  reg_to_tlul #(
-      .req_t(reg_pkg::reg_req_t),
-      .rsp_t(reg_pkg::reg_rsp_t),
-      .tl_h2d_t(tlul_pkg::tl_h2d_t),
-      .tl_d2h_t(tlul_pkg::tl_d2h_t),
-      .tl_a_user_t(tlul_pkg::tl_a_user_t),
-      .tl_a_op_e(tlul_pkg::tl_a_op_e),
-      .TL_A_USER_DEFAULT(tlul_pkg::TL_A_USER_DEFAULT),
-      .PutFullData(tlul_pkg::PutFullData),
-      .Get(tlul_pkg::Get)
-  ) reg_to_tlul_gpio_i (
-      .tl_o(gpio_tl_h2d),
-      .tl_i(gpio_tl_d2h),
-      .reg_req_i(peripheral_slv_req[core_v_mini_mcu_pkg::GPIO_IDX]),
-      .reg_rsp_o(peripheral_slv_rsp[core_v_mini_mcu_pkg::GPIO_IDX])
-  );
-
-  gpio gpio_i (
+  gpio #(
+      .reg_req_t(reg_pkg::reg_req_t),
+      .reg_rsp_t(reg_pkg::reg_rsp_t)
+  )  gpio_i (
       .clk_i,
       .rst_ni,
-      .tl_i(gpio_tl_h2d),
-      .tl_o(gpio_tl_d2h),
-      .cio_gpio_i({cio_gpio_i, 8'b0}),
-      .cio_gpio_o({cio_gpio_o, cio_gpio_unused}),
-      .cio_gpio_en_o({cio_gpio_en_o, cio_gpio_en_unused}),
-      .intr_gpio_o({gpio_intr, gpio_int_unused})
+      .reg_req_i(peripheral_slv_req[core_v_mini_mcu_pkg::GPIO_IDX]),
+      .reg_rsp_o(peripheral_slv_rsp[core_v_mini_mcu_pkg::GPIO_IDX]),
+      .gpio_in({cio_gpio_i, 8'b0}),
+      .gpio_out({cio_gpio_o, cio_gpio_unused}),
+      .gpio_tx_en_o({cio_gpio_en_o, cio_gpio_en_unused}),
+      .gpio_in_sync_o(),
+      .interrupt_o({gpio_intr, gpio_int_unused})
   );
 
   reg_to_tlul #(

hw/simulation/pad_cell_inout.sv

@@ -9,8 +9,7 @@ module pad_cell_inout #(
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
-    inout logic pad_io,
-    input logic [PADATTR-1:0] pad_attributes_i
+    inout logic pad_io
 );
 
   logic pad;

hw/simulation/pad_cell_input.sv

@@ -9,8 +9,7 @@ module pad_cell_input #(
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
-    inout logic pad_io,
-    input logic [PADATTR-1:0] pad_attributes_i
+    inout logic pad_io
 );
 
   logic pad;

hw/simulation/pad_cell_output.sv

@@ -9,8 +9,7 @@ module pad_cell_output #(
     input logic pad_in_i,
     input logic pad_oe_i,
     output logic pad_out_o,
-    inout logic pad_io,
-    input logic [PADATTR-1:0] pad_attributes_i
+    inout logic pad_io
 );
 
   logic pad;

hw/system/padframe/include/padframe/assign.svh

@@ -0,0 +1,51 @@
+// File auto-generated by Padrick 0.3.1.post0.dev2+ge09286c
+
+// Assignment Macros
+// Assigns all members of port struct to another struct with same names but potentially different order
+
+`define ASSIGN_XHEEP_I2C_PAD2SOC(load, driver) \
+  assign load.i2c_scl_o = driver.i2c_scl_o; \
+  assign load.i2c_sda_o = driver.i2c_sda_o; \
+
+`define ASSIGN_XHEEP_I2C_SOC2PAD(load, driver) \
+  assign load.i2c_scl_i = driver.i2c_scl_i; \
+  assign load.i2c_scl_oe_i = driver.i2c_scl_oe_i; \
+  assign load.i2c_sda_i = driver.i2c_sda_i; \
+  assign load.i2c_sda_oe_i = driver.i2c_sda_oe_i; \
+
+`define ASSIGN_XHEEP_GPIO_PAD2SOC(load, driver) \
+  assign load.gpio_30_o = driver.gpio_30_o; \
+  assign load.gpio_31_o = driver.gpio_31_o; \
+
+`define ASSIGN_XHEEP_GPIO_SOC2PAD(load, driver) \
+  assign load.gpio_30_i = driver.gpio_30_i; \
+  assign load.gpio_30_oe_i = driver.gpio_30_oe_i; \
+  assign load.gpio_31_i = driver.gpio_31_i; \
+  assign load.gpio_31_oe_i = driver.gpio_31_oe_i; \
+
+`define ASSIGN_XHEEP_SPI2_PAD2SOC(load, driver) \
+  assign load.spi2_cs_00_o = driver.spi2_cs_00_o; \
+  assign load.spi2_cs_01_o = driver.spi2_cs_01_o; \
+  assign load.spi2_sck_o = driver.spi2_sck_o; \
+  assign load.spi2_sd_00_o = driver.spi2_sd_00_o; \
+  assign load.spi2_sd_01_o = driver.spi2_sd_01_o; \
+  assign load.spi2_sd_02_o = driver.spi2_sd_02_o; \
+  assign load.spi2_sd_03_o = driver.spi2_sd_03_o; \
+
+`define ASSIGN_XHEEP_SPI2_SOC2PAD(load, driver) \
+  assign load.spi2_cs_00_i = driver.spi2_cs_00_i; \
+  assign load.spi2_cs_00_oe_i = driver.spi2_cs_00_oe_i; \
+  assign load.spi2_cs_01_i = driver.spi2_cs_01_i; \
+  assign load.spi2_cs_01_oe_i = driver.spi2_cs_01_oe_i; \
+  assign load.spi2_sck_i = driver.spi2_sck_i; \
+  assign load.spi2_sck_oe_i = driver.spi2_sck_oe_i; \
+  assign load.spi2_sd_00_i = driver.spi2_sd_00_i; \
+  assign load.spi2_sd_00_oe_i = driver.spi2_sd_00_oe_i; \
+  assign load.spi2_sd_01_i = driver.spi2_sd_01_i; \
+  assign load.spi2_sd_01_oe_i = driver.spi2_sd_01_oe_i; \
+  assign load.spi2_sd_02_i = driver.spi2_sd_02_i; \
+  assign load.spi2_sd_02_oe_i = driver.spi2_sd_02_oe_i; \
+  assign load.spi2_sd_03_i = driver.spi2_sd_03_i; \
+  assign load.spi2_sd_03_oe_i = driver.spi2_sd_03_oe_i; \
+
+

hw/system/padframe/ips_list.yml

@@ -0,0 +1,17 @@
+# File auto-generated by Padrick 0.3.1.post0.dev2+ge09286c
+# IPApprox dependencies for padframe
+common_cells:
+  commit: v1.21.0
+  domain: [cluster, soc]
+  server: https://github.com
+  group: pulp-platform
+register_interface:
+  commit: v0.2.1
+  domain: [soc]
+  server: https://github.com
+  group: pulp-platform
+axi/axi:
+  commit: v0.27.0
+  domain: [cluster, soc]
+  server: https://github.com
+  group: pulp-platform

hw/system/padframe/padframe.core

@@ -0,0 +1,30 @@
+CAPI=2:
+
+name: "x-heep:ip:padframe"
+description: "core-v-mini-mcu dma peripheral"
+
+# Copyright 2022 EPFL
+# Solderpad Hardware License, Version 2.1, see LICENSE.md for details.
+# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+
+filesets:
+  files_rtl:
+    depend:
+      - pulp-platform.org::common_cells
+      - pulp-platform.org::register_interface
+    files:
+    - include/padframe/assign.svh: {is_include_file: true}
+    - src/pkg_padframe.sv
+    - src/pkg_internal_padframe_xheep.sv
+    - src/padframe_xheep_config_reg_pkg.sv
+    - src/padframe_xheep_config_reg_top.sv
+    - src/padframe_xheep_pads.sv
+    - src/padframe_xheep_muxer.sv
+    - src/padframe_xheep.sv
+    - src/padframe.sv
+    file_type: systemVerilogSource
+
+targets:
+  default:
+    filesets:
+    - files_rtl